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authorLinus Torvalds <torvalds@linux-foundation.org>2012-10-07 08:20:57 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-10-07 08:20:57 -0400
commit0e51793e162ca432fc5f04178cf82b80a92c2659 (patch)
treecf7ffdb5064e2f7b6647a63e7323d1c4e99b7739 /arch/arm/mm
parent5cad3598ea0cdb817681f74518d3213583a04f7a (diff)
parentb4874a3d298606c20118d1ead73235439bbc2823 (diff)
Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM updates from Russell King: "This is the first chunk of ARM updates for this merge window. Conflicts are expected in two files - asm/timex.h and mach-integrator/integrator_cp.c. Nothing particularly stands out more than anything else. Most of the growth is down to the opcodes stuff from Dave Martin, which is countered by Rob's patches to use more of the asm-generic headers on ARM." (A few more conflicts grew since then, but it all looked fairly trivial) * 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (44 commits) ARM: 7548/1: include linux/sched.h in syscall.h ARM: 7541/1: Add ARM ERRATA 775420 workaround ARM: ensure vm_struct has its phys_addr member filled in ARM: 7540/1: kexec: Check segment memory addresses ARM: 7539/1: kexec: scan for dtb magic in segments ARM: 7538/1: delay: add registration mechanism for delay timer sources ARM: 7536/1: smp: Formalize an IPI for wakeup ARM: 7525/1: ptrace: use updated syscall number for syscall auditing ARM: 7524/1: support syscall tracing ARM: 7519/1: integrator: convert platform devices to Device Tree ARM: 7518/1: integrator: convert AMBA devices to device tree ARM: 7517/1: integrator: initial device tree support ARM: 7516/1: plat-versatile: add DT support to FPGA IRQ ARM: 7515/1: integrator: check PL010 base address from resource ARM: 7514/1: integrator: call common init function from machine ARM: 7522/1: arch_timers: register a time/cycle counter ARM: 7523/1: arch_timers: enable the use of the virtual timer ARM: 7531/1: mark kernelmode mem{cpy,set} non-experimental ARM: 7520/1: Build dtb files in all target ARM: Fix build warning in arch/arm/mm/alignment.c ...
Diffstat (limited to 'arch/arm/mm')
-rw-r--r--arch/arm/mm/alignment.c6
-rw-r--r--arch/arm/mm/cache-l2x0.c8
-rw-r--r--arch/arm/mm/cache-v7.S3
-rw-r--r--arch/arm/mm/init.c2
-rw-r--r--arch/arm/mm/ioremap.c1
5 files changed, 14 insertions, 6 deletions
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index 9107231aacc5..b9f60ebe3bc4 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -699,7 +699,6 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs,
699 unsigned long instr = *pinstr; 699 unsigned long instr = *pinstr;
700 u16 tinst1 = (instr >> 16) & 0xffff; 700 u16 tinst1 = (instr >> 16) & 0xffff;
701 u16 tinst2 = instr & 0xffff; 701 u16 tinst2 = instr & 0xffff;
702 poffset->un = 0;
703 702
704 switch (tinst1 & 0xffe0) { 703 switch (tinst1 & 0xffe0) {
705 /* A6.3.5 Load/Store multiple */ 704 /* A6.3.5 Load/Store multiple */
@@ -854,9 +853,10 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
854 break; 853 break;
855 854
856 case 0x08000000: /* ldm or stm, or thumb-2 32bit instruction */ 855 case 0x08000000: /* ldm or stm, or thumb-2 32bit instruction */
857 if (thumb2_32b) 856 if (thumb2_32b) {
857 offset.un = 0;
858 handler = do_alignment_t32_to_handler(&instr, regs, &offset); 858 handler = do_alignment_t32_to_handler(&instr, regs, &offset);
859 else 859 } else
860 handler = do_alignment_ldmstm; 860 handler = do_alignment_ldmstm;
861 break; 861 break;
862 862
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 577baf7d0a8d..8a97e6443c62 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -368,14 +368,18 @@ void __init l2x0_init(void __iomem *base, u32 aux_val, u32 aux_mask)
368 /* l2x0 controller is disabled */ 368 /* l2x0 controller is disabled */
369 writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL); 369 writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL);
370 370
371 l2x0_saved_regs.aux_ctrl = aux;
372
373 l2x0_inv_all(); 371 l2x0_inv_all();
374 372
375 /* enable L2X0 */ 373 /* enable L2X0 */
376 writel_relaxed(1, l2x0_base + L2X0_CTRL); 374 writel_relaxed(1, l2x0_base + L2X0_CTRL);
377 } 375 }
378 376
377 /* Re-read it in case some bits are reserved. */
378 aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
379
380 /* Save the value for resuming. */
381 l2x0_saved_regs.aux_ctrl = aux;
382
379 outer_cache.inv_range = l2x0_inv_range; 383 outer_cache.inv_range = l2x0_inv_range;
380 outer_cache.clean_range = l2x0_clean_range; 384 outer_cache.clean_range = l2x0_clean_range;
381 outer_cache.flush_range = l2x0_flush_range; 385 outer_cache.flush_range = l2x0_flush_range;
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index 39e3fb3db801..3b172275262e 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -211,6 +211,9 @@ ENTRY(v7_coherent_user_range)
211 * isn't mapped, fail with -EFAULT. 211 * isn't mapped, fail with -EFAULT.
212 */ 212 */
2139001: 2139001:
214#ifdef CONFIG_ARM_ERRATA_775420
215 dsb
216#endif
214 mov r0, #-EFAULT 217 mov r0, #-EFAULT
215 mov pc, lr 218 mov pc, lr
216 UNWIND(.fnend ) 219 UNWIND(.fnend )
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 9aec41fa80ae..ad722f1208a5 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -324,7 +324,7 @@ phys_addr_t __init arm_memblock_steal(phys_addr_t size, phys_addr_t align)
324 324
325 BUG_ON(!arm_memblock_steal_permitted); 325 BUG_ON(!arm_memblock_steal_permitted);
326 326
327 phys = memblock_alloc(size, align); 327 phys = memblock_alloc_base(size, align, MEMBLOCK_ALLOC_ANYWHERE);
328 memblock_free(phys, size); 328 memblock_free(phys, size);
329 memblock_remove(phys, size); 329 memblock_remove(phys, size);
330 330
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 9d869f93a3da..5dcc2fd46c46 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -248,6 +248,7 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
248 if (!area) 248 if (!area)
249 return NULL; 249 return NULL;
250 addr = (unsigned long)area->addr; 250 addr = (unsigned long)area->addr;
251 area->phys_addr = __pfn_to_phys(pfn);
251 252
252#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE) 253#if !defined(CONFIG_SMP) && !defined(CONFIG_ARM_LPAE)
253 if (DOMAIN_IO == 0 && 254 if (DOMAIN_IO == 0 &&