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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/arm/mm/tlb-v4wb.S
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/arm/mm/tlb-v4wb.S')
-rw-r--r--arch/arm/mm/tlb-v4wb.S77
1 files changed, 77 insertions, 0 deletions
diff --git a/arch/arm/mm/tlb-v4wb.S b/arch/arm/mm/tlb-v4wb.S
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1/*
2 * linux/arch/arm/mm/tlbv4wb.S
3 *
4 * Copyright (C) 1997-2002 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * ARM architecture version 4 TLB handling functions.
11 * These assume a split I/D TLBs w/o I TLB entry, with a write buffer.
12 *
13 * Processors: SA110 SA1100 SA1110
14 */
15#include <linux/linkage.h>
16#include <linux/init.h>
17#include <asm/constants.h>
18#include <asm/tlbflush.h>
19#include "proc-macros.S"
20
21 .align 5
22/*
23 * v4wb_flush_user_tlb_range(start, end, mm)
24 *
25 * Invalidate a range of TLB entries in the specified address space.
26 *
27 * - start - range start address
28 * - end - range end address
29 * - mm - mm_struct describing address space
30 */
31 .align 5
32ENTRY(v4wb_flush_user_tlb_range)
33 vma_vm_mm ip, r2
34 act_mm r3 @ get current->active_mm
35 eors r3, ip, r3 @ == mm ?
36 movne pc, lr @ no, we dont do anything
37 vma_vm_flags r2, r2
38 mcr p15, 0, r3, c7, c10, 4 @ drain WB
39 tst r2, #VM_EXEC
40 mcrne p15, 0, r3, c8, c5, 0 @ invalidate I TLB
41 bic r0, r0, #0x0ff
42 bic r0, r0, #0xf00
431: mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry
44 add r0, r0, #PAGE_SZ
45 cmp r0, r1
46 blo 1b
47 mov pc, lr
48
49/*
50 * v4_flush_kern_tlb_range(start, end)
51 *
52 * Invalidate a range of TLB entries in the specified kernel
53 * address range.
54 *
55 * - start - virtual address (may not be aligned)
56 * - end - virtual address (may not be aligned)
57 */
58ENTRY(v4wb_flush_kern_tlb_range)
59 mov r3, #0
60 mcr p15, 0, r3, c7, c10, 4 @ drain WB
61 bic r0, r0, #0x0ff
62 bic r0, r0, #0xf00
63 mcr p15, 0, r3, c8, c5, 0 @ invalidate I TLB
641: mcr p15, 0, r0, c8, c6, 1 @ invalidate D TLB entry
65 add r0, r0, #PAGE_SZ
66 cmp r0, r1
67 blo 1b
68 mov pc, lr
69
70 __INITDATA
71
72 .type v4wb_tlb_fns, #object
73ENTRY(v4wb_tlb_fns)
74 .long v4wb_flush_user_tlb_range
75 .long v4wb_flush_kern_tlb_range
76 .long v4wb_tlb_flags
77 .size v4wb_tlb_fns, . - v4wb_tlb_fns