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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-16 22:03:06 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-16 22:03:06 -0400 |
commit | 16d8775700f1815076f879719ce14b33f50a3171 (patch) | |
tree | 8525e6e6f12b6acf7cf2746853cc65549f3dbf4c /arch/arm/mm/proc-xscale.S | |
parent | e34551339a195aa548eaf698523714a8fe7f1984 (diff) | |
parent | 05e34754518b6a90d5c392790c032575fab12d66 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (91 commits)
ARM: 6806/1: irq: introduce entry and exit functions for chained handlers
ARM: 6781/1: Thumb-2: Work around buggy Thumb-2 short branch relocations in gas
ARM: 6747/1: P2V: Thumb2 support
ARM: 6798/1: aout-core: zero thread debug registers in a.out core dump
ARM: 6796/1: Footbridge: Fix I/O mappings for NOMMU mode
ARM: 6784/1: errata: no automatic Store Buffer drain on Cortex-A9
ARM: 6772/1: errata: possible fault MMU translations following an ASID switch
ARM: 6776/1: mach-ux500: activate fix for errata 753970
ARM: 6794/1: SPEAr: Append UL to device address macros.
ARM: 6793/1: SPEAr: Remove unused *_SIZE macros from spear*.h files
ARM: 6792/1: SPEAr: Replace SIZE macro's with SZ_4K macros
ARM: 6791/1: SPEAr3xx: Declare device structures after shirq code
ARM: 6790/1: SPEAr: Clock Framework: Rename usbd clock and align apb_clk entry
ARM: 6789/1: SPEAr3xx: Rename sdio to sdhci
ARM: 6788/1: SPEAr: Include mach/hardware.h instead of mach/spear.h
ARM: 6787/1: SPEAr: Reorder #includes in .h & .c files.
ARM: 6681/1: SPEAr: add debugfs support to clk API
ARM: 6703/1: SPEAr: update clk API support
ARM: 6679/1: SPEAr: make clk API functions more generic
ARM: 6737/1: SPEAr: formalized timer support
...
Diffstat (limited to 'arch/arm/mm/proc-xscale.S')
-rw-r--r-- | arch/arm/mm/proc-xscale.S | 45 |
1 files changed, 43 insertions, 2 deletions
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 5a37c5e45c41..086038cd86ab 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S | |||
@@ -513,11 +513,49 @@ ENTRY(cpu_xscale_set_pte_ext) | |||
513 | xscale_set_pte_ext_epilogue | 513 | xscale_set_pte_ext_epilogue |
514 | mov pc, lr | 514 | mov pc, lr |
515 | 515 | ||
516 | |||
517 | .ltorg | 516 | .ltorg |
518 | |||
519 | .align | 517 | .align |
520 | 518 | ||
519 | .globl cpu_xscale_suspend_size | ||
520 | .equ cpu_xscale_suspend_size, 4 * 7 | ||
521 | #ifdef CONFIG_PM | ||
522 | ENTRY(cpu_xscale_do_suspend) | ||
523 | stmfd sp!, {r4 - r10, lr} | ||
524 | mrc p14, 0, r4, c6, c0, 0 @ clock configuration, for turbo mode | ||
525 | mrc p15, 0, r5, c15, c1, 0 @ CP access reg | ||
526 | mrc p15, 0, r6, c13, c0, 0 @ PID | ||
527 | mrc p15, 0, r7, c3, c0, 0 @ domain ID | ||
528 | mrc p15, 0, r8, c2, c0, 0 @ translation table base addr | ||
529 | mrc p15, 0, r9, c1, c1, 0 @ auxiliary control reg | ||
530 | mrc p15, 0, r10, c1, c0, 0 @ control reg | ||
531 | bic r4, r4, #2 @ clear frequency change bit | ||
532 | stmia r0, {r4 - r10} @ store cp regs | ||
533 | ldmfd sp!, {r4 - r10, pc} | ||
534 | ENDPROC(cpu_xscale_do_suspend) | ||
535 | |||
536 | ENTRY(cpu_xscale_do_resume) | ||
537 | ldmia r0, {r4 - r10} @ load cp regs | ||
538 | mov ip, #0 | ||
539 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | ||
540 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB | ||
541 | mcr p14, 0, r4, c6, c0, 0 @ clock configuration, turbo mode. | ||
542 | mcr p15, 0, r5, c15, c1, 0 @ CP access reg | ||
543 | mcr p15, 0, r6, c13, c0, 0 @ PID | ||
544 | mcr p15, 0, r7, c3, c0, 0 @ domain ID | ||
545 | mcr p15, 0, r8, c2, c0, 0 @ translation table base addr | ||
546 | mcr p15, 0, r9, c1, c1, 0 @ auxiliary control reg | ||
547 | mov r0, r10 @ control register | ||
548 | mov r2, r8, lsr #14 @ get TTB0 base | ||
549 | mov r2, r2, lsl #14 | ||
550 | ldr r3, =PMD_TYPE_SECT | PMD_SECT_BUFFERABLE | \ | ||
551 | PMD_SECT_CACHEABLE | PMD_SECT_AP_WRITE | ||
552 | b cpu_resume_mmu | ||
553 | ENDPROC(cpu_xscale_do_resume) | ||
554 | #else | ||
555 | #define cpu_xscale_do_suspend 0 | ||
556 | #define cpu_xscale_do_resume 0 | ||
557 | #endif | ||
558 | |||
521 | __CPUINIT | 559 | __CPUINIT |
522 | 560 | ||
523 | .type __xscale_setup, #function | 561 | .type __xscale_setup, #function |
@@ -565,6 +603,9 @@ ENTRY(xscale_processor_functions) | |||
565 | .word cpu_xscale_dcache_clean_area | 603 | .word cpu_xscale_dcache_clean_area |
566 | .word cpu_xscale_switch_mm | 604 | .word cpu_xscale_switch_mm |
567 | .word cpu_xscale_set_pte_ext | 605 | .word cpu_xscale_set_pte_ext |
606 | .word cpu_xscale_suspend_size | ||
607 | .word cpu_xscale_do_suspend | ||
608 | .word cpu_xscale_do_resume | ||
568 | .size xscale_processor_functions, . - xscale_processor_functions | 609 | .size xscale_processor_functions, . - xscale_processor_functions |
569 | 610 | ||
570 | .section ".rodata" | 611 | .section ".rodata" |