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authorRussell King <rmk+kernel@arm.linux.org.uk>2009-11-26 07:56:21 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-12-14 09:53:22 -0500
commit2c9b9c8490b60428fa2d1c64042f7c7caed93940 (patch)
treec8af289af8c801193eea924db0cd81f09068ddb9 /arch/arm/mm/proc-xsc3.S
parentccaf5f05b218e5eb41e2f5cdfd26b18dce4a0218 (diff)
ARM: add size argument to __cpuc_flush_dcache_page
... and rename the function since it no longer operates on just pages. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/proc-xsc3.S')
-rw-r--r--arch/arm/mm/proc-xsc3.S11
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index fab134e29826..96456f548798 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -226,15 +226,16 @@ ENTRY(xsc3_coherent_user_range)
226 mov pc, lr 226 mov pc, lr
227 227
228/* 228/*
229 * flush_kern_dcache_page(void *page) 229 * flush_kern_dcache_area(void *addr, size_t size)
230 * 230 *
231 * Ensure no D cache aliasing occurs, either with itself or 231 * Ensure no D cache aliasing occurs, either with itself or
232 * the I cache. 232 * the I cache.
233 * 233 *
234 * - addr - page aligned address 234 * - addr - kernel address
235 * - size - region size
235 */ 236 */
236ENTRY(xsc3_flush_kern_dcache_page) 237ENTRY(xsc3_flush_kern_dcache_area)
237 add r1, r0, #PAGE_SZ 238 add r1, r0, r1
2381: mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line 2391: mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line
239 add r0, r0, #CACHELINESIZE 240 add r0, r0, #CACHELINESIZE
240 cmp r0, r1 241 cmp r0, r1
@@ -309,7 +310,7 @@ ENTRY(xsc3_cache_fns)
309 .long xsc3_flush_user_cache_range 310 .long xsc3_flush_user_cache_range
310 .long xsc3_coherent_kern_range 311 .long xsc3_coherent_kern_range
311 .long xsc3_coherent_user_range 312 .long xsc3_coherent_user_range
312 .long xsc3_flush_kern_dcache_page 313 .long xsc3_flush_kern_dcache_area
313 .long xsc3_dma_inv_range 314 .long xsc3_dma_inv_range
314 .long xsc3_dma_clean_range 315 .long xsc3_dma_clean_range
315 .long xsc3_dma_flush_range 316 .long xsc3_dma_flush_range