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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-01-06 17:33:19 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-01-06 17:33:19 -0500
commit28cdac6690cb113856293bf79b40de33dbd8f974 (patch)
tree64cd8ca8376ccf9a12faee3588c15a5839f9a28b /arch/arm/mm/proc-v7.S
parent4073723acb9cdcdbe4df9c0e0c376c65d1697e43 (diff)
parent36bb94ba36f332de767cfaa3af6a5136435a3a9c (diff)
Merge branch 'pgt' (early part) into devel
Diffstat (limited to 'arch/arm/mm/proc-v7.S')
-rw-r--r--arch/arm/mm/proc-v7.S18
1 files changed, 8 insertions, 10 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 7401f4d7e676..b49fab21517c 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -124,15 +124,13 @@ ENDPROC(cpu_v7_switch_mm)
124 * Set a level 2 translation table entry. 124 * Set a level 2 translation table entry.
125 * 125 *
126 * - ptep - pointer to level 2 translation table entry 126 * - ptep - pointer to level 2 translation table entry
127 * (hardware version is stored at -1024 bytes) 127 * (hardware version is stored at +2048 bytes)
128 * - pte - PTE value to store 128 * - pte - PTE value to store
129 * - ext - value for extended PTE bits 129 * - ext - value for extended PTE bits
130 */ 130 */
131ENTRY(cpu_v7_set_pte_ext) 131ENTRY(cpu_v7_set_pte_ext)
132#ifdef CONFIG_MMU 132#ifdef CONFIG_MMU
133 ARM( str r1, [r0], #-2048 ) @ linux version 133 str r1, [r0] @ linux version
134 THUMB( str r1, [r0] ) @ linux version
135 THUMB( sub r0, r0, #2048 )
136 134
137 bic r3, r1, #0x000003f0 135 bic r3, r1, #0x000003f0
138 bic r3, r3, #PTE_TYPE_MASK 136 bic r3, r3, #PTE_TYPE_MASK
@@ -142,9 +140,9 @@ ENTRY(cpu_v7_set_pte_ext)
142 tst r1, #1 << 4 140 tst r1, #1 << 4
143 orrne r3, r3, #PTE_EXT_TEX(1) 141 orrne r3, r3, #PTE_EXT_TEX(1)
144 142
145 tst r1, #L_PTE_WRITE 143 eor r1, r1, #L_PTE_DIRTY
146 tstne r1, #L_PTE_DIRTY 144 tst r1, #L_PTE_RDONLY | L_PTE_DIRTY
147 orreq r3, r3, #PTE_EXT_APX 145 orrne r3, r3, #PTE_EXT_APX
148 146
149 tst r1, #L_PTE_USER 147 tst r1, #L_PTE_USER
150 orrne r3, r3, #PTE_EXT_AP1 148 orrne r3, r3, #PTE_EXT_AP1
@@ -154,14 +152,14 @@ ENTRY(cpu_v7_set_pte_ext)
154 bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0 152 bicne r3, r3, #PTE_EXT_APX | PTE_EXT_AP0
155#endif 153#endif
156 154
157 tst r1, #L_PTE_EXEC 155 tst r1, #L_PTE_XN
158 orreq r3, r3, #PTE_EXT_XN 156 orrne r3, r3, #PTE_EXT_XN
159 157
160 tst r1, #L_PTE_YOUNG 158 tst r1, #L_PTE_YOUNG
161 tstne r1, #L_PTE_PRESENT 159 tstne r1, #L_PTE_PRESENT
162 moveq r3, #0 160 moveq r3, #0
163 161
164 str r3, [r0] 162 str r3, [r0, #2048]!
165 mcr p15, 0, r0, c7, c10, 1 @ flush_pte 163 mcr p15, 0, r0, c7, c10, 1 @ flush_pte
166#endif 164#endif
167 mov pc, lr 165 mov pc, lr