diff options
author | Catalin Marinas <catalin.marinas@arm.com> | 2008-08-28 06:22:32 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-09-01 07:06:34 -0400 |
commit | 93ed3970114983543bbebd195bef65db84444ea2 (patch) | |
tree | 9df88b61a2a7b3cc493c6cfc5f4848448250f6b5 /arch/arm/mm/proc-v7.S | |
parent | 8d5796d2ec6b5a4e7a52861144e63af438d6f8f7 (diff) |
[ARM] 5227/1: Add the ENDPROC declarations to the .S files
This declaration specifies the "function" type and size for various
assembly functions, mainly needed for generating the correct branch
instructions in Thumb-2.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/proc-v7.S')
-rw-r--r-- | arch/arm/mm/proc-v7.S | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index b49f9a4c82c8..dff967784626 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -25,9 +25,11 @@ | |||
25 | 25 | ||
26 | ENTRY(cpu_v7_proc_init) | 26 | ENTRY(cpu_v7_proc_init) |
27 | mov pc, lr | 27 | mov pc, lr |
28 | ENDPROC(cpu_v7_proc_init) | ||
28 | 29 | ||
29 | ENTRY(cpu_v7_proc_fin) | 30 | ENTRY(cpu_v7_proc_fin) |
30 | mov pc, lr | 31 | mov pc, lr |
32 | ENDPROC(cpu_v7_proc_fin) | ||
31 | 33 | ||
32 | /* | 34 | /* |
33 | * cpu_v7_reset(loc) | 35 | * cpu_v7_reset(loc) |
@@ -43,6 +45,7 @@ ENTRY(cpu_v7_proc_fin) | |||
43 | .align 5 | 45 | .align 5 |
44 | ENTRY(cpu_v7_reset) | 46 | ENTRY(cpu_v7_reset) |
45 | mov pc, r0 | 47 | mov pc, r0 |
48 | ENDPROC(cpu_v7_reset) | ||
46 | 49 | ||
47 | /* | 50 | /* |
48 | * cpu_v7_do_idle() | 51 | * cpu_v7_do_idle() |
@@ -54,6 +57,7 @@ ENTRY(cpu_v7_reset) | |||
54 | ENTRY(cpu_v7_do_idle) | 57 | ENTRY(cpu_v7_do_idle) |
55 | .long 0xe320f003 @ ARM V7 WFI instruction | 58 | .long 0xe320f003 @ ARM V7 WFI instruction |
56 | mov pc, lr | 59 | mov pc, lr |
60 | ENDPROC(cpu_v7_do_idle) | ||
57 | 61 | ||
58 | ENTRY(cpu_v7_dcache_clean_area) | 62 | ENTRY(cpu_v7_dcache_clean_area) |
59 | #ifndef TLB_CAN_READ_FROM_L1_CACHE | 63 | #ifndef TLB_CAN_READ_FROM_L1_CACHE |
@@ -65,6 +69,7 @@ ENTRY(cpu_v7_dcache_clean_area) | |||
65 | dsb | 69 | dsb |
66 | #endif | 70 | #endif |
67 | mov pc, lr | 71 | mov pc, lr |
72 | ENDPROC(cpu_v7_dcache_clean_area) | ||
68 | 73 | ||
69 | /* | 74 | /* |
70 | * cpu_v7_switch_mm(pgd_phys, tsk) | 75 | * cpu_v7_switch_mm(pgd_phys, tsk) |
@@ -89,6 +94,7 @@ ENTRY(cpu_v7_switch_mm) | |||
89 | isb | 94 | isb |
90 | #endif | 95 | #endif |
91 | mov pc, lr | 96 | mov pc, lr |
97 | ENDPROC(cpu_v7_switch_mm) | ||
92 | 98 | ||
93 | /* | 99 | /* |
94 | * cpu_v7_set_pte_ext(ptep, pte) | 100 | * cpu_v7_set_pte_ext(ptep, pte) |
@@ -141,6 +147,7 @@ ENTRY(cpu_v7_set_pte_ext) | |||
141 | mcr p15, 0, r0, c7, c10, 1 @ flush_pte | 147 | mcr p15, 0, r0, c7, c10, 1 @ flush_pte |
142 | #endif | 148 | #endif |
143 | mov pc, lr | 149 | mov pc, lr |
150 | ENDPROC(cpu_v7_set_pte_ext) | ||
144 | 151 | ||
145 | cpu_v7_name: | 152 | cpu_v7_name: |
146 | .ascii "ARMv7 Processor" | 153 | .ascii "ARMv7 Processor" |
@@ -188,6 +195,7 @@ __v7_setup: | |||
188 | bic r0, r0, r5 @ clear bits them | 195 | bic r0, r0, r5 @ clear bits them |
189 | orr r0, r0, r6 @ set them | 196 | orr r0, r0, r6 @ set them |
190 | mov pc, lr @ return to head.S:__ret | 197 | mov pc, lr @ return to head.S:__ret |
198 | ENDPROC(__v7_setup) | ||
191 | 199 | ||
192 | /* | 200 | /* |
193 | * V X F I D LR | 201 | * V X F I D LR |