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authorLinus Torvalds <torvalds@linux-foundation.org>2011-05-27 22:51:32 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-05-27 22:51:32 -0400
commit2a56d2220284b0e4dd8569fa475d7053f1c40a63 (patch)
tree96f959486a2f31db599e5f97167074bd1ecb3dc6 /arch/arm/mm/proc-v7.S
parent46f2cc80514e389bacfb642a32a4181fa1f1d20b (diff)
parent239df0fd5ee25588f8a5ba7f7ee646940cc403f4 (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (45 commits) ARM: 6945/1: Add unwinding support for division functions ARM: kill pmd_off() ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks ARM: 6943/1: mm: use TTBR1 instead of reserved context ID ARM: 6942/1: mm: make TTBR1 always point to swapper_pg_dir on ARMv6/7 ARM: 6941/1: cache: ensure MVA is cacheline aligned in flush_kern_dcache_area ARM: add sendmmsg syscall ARM: 6863/1: allow hotplug on msm ARM: 6832/1: mmci: support for ST-Ericsson db8500v2 ARM: 6830/1: mach-ux500: force PrimeCell revisions ARM: 6829/1: amba: make hardcoded periphid override hardware ARM: 6828/1: mach-ux500: delete SSP PrimeCell ID ARM: 6827/1: mach-netx: delete hardcoded periphid ARM: 6940/1: fiq: Briefly document driver responsibilities for suspend/resume ARM: 6938/1: fiq: Refactor {get,set}_fiq_regs() for Thumb-2 ARM: 6914/1: sparsemem: fix highmem detection when using SPARSEMEM ARM: 6913/1: sparsemem: allow pfn_valid to be overridden when using SPARSEMEM at91: drop at572d940hf support at91rm9200: introduce at91rm9200_set_type to specficy cpu package at91: drop boot_params and PLAT_PHYS_OFFSET ...
Diffstat (limited to 'arch/arm/mm/proc-v7.S')
-rw-r--r--arch/arm/mm/proc-v7.S14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index babfba09c89f..b3b566ec83d3 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -108,18 +108,16 @@ ENTRY(cpu_v7_switch_mm)
108#ifdef CONFIG_ARM_ERRATA_430973 108#ifdef CONFIG_ARM_ERRATA_430973
109 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB 109 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
110#endif 110#endif
111#ifdef CONFIG_ARM_ERRATA_754322 111 mrc p15, 0, r2, c2, c0, 1 @ load TTB 1
112 dsb 112 mcr p15, 0, r2, c2, c0, 0 @ into TTB 0
113#endif
114 mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID
115 isb
1161: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0
117 isb 113 isb
118#ifdef CONFIG_ARM_ERRATA_754322 114#ifdef CONFIG_ARM_ERRATA_754322
119 dsb 115 dsb
120#endif 116#endif
121 mcr p15, 0, r1, c13, c0, 1 @ set context ID 117 mcr p15, 0, r1, c13, c0, 1 @ set context ID
122 isb 118 isb
119 mcr p15, 0, r0, c2, c0, 0 @ set TTB 0
120 isb
123#endif 121#endif
124 mov pc, lr 122 mov pc, lr
125ENDPROC(cpu_v7_switch_mm) 123ENDPROC(cpu_v7_switch_mm)
@@ -368,7 +366,9 @@ __v7_setup:
368 mcr p15, 0, r10, c2, c0, 2 @ TTB control register 366 mcr p15, 0, r10, c2, c0, 2 @ TTB control register
369 ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP) 367 ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP)
370 ALT_UP(orr r4, r4, #TTB_FLAGS_UP) 368 ALT_UP(orr r4, r4, #TTB_FLAGS_UP)
371 mcr p15, 0, r4, c2, c0, 1 @ load TTB1 369 ALT_SMP(orr r8, r8, #TTB_FLAGS_SMP)
370 ALT_UP(orr r8, r8, #TTB_FLAGS_UP)
371 mcr p15, 0, r8, c2, c0, 1 @ load TTB1
372 ldr r5, =PRRR @ PRRR 372 ldr r5, =PRRR @ PRRR
373 ldr r6, =NMRR @ NMRR 373 ldr r6, =NMRR @ NMRR
374 mcr p15, 0, r5, c10, c2, 0 @ write PRRR 374 mcr p15, 0, r5, c10, c2, 0 @ write PRRR