diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-04-13 18:32:13 -0400 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-04-13 18:32:13 -0400 |
commit | a84bd2ee81ea1bdbd238cd1c380ec25f50a876c5 (patch) | |
tree | ba054d4b1a20dadec088fd4d8983fb5939227e46 /arch/arm/mm/proc-v6.S | |
parent | aec995900fbc8cffa9f0f9e797ef07a0beb2b079 (diff) | |
parent | 7db6a7fa09884b34d2a5d4e6e4ed58664a5f0cf8 (diff) |
Merge branch 'fix' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into fixes
Diffstat (limited to 'arch/arm/mm/proc-v6.S')
-rw-r--r-- | arch/arm/mm/proc-v6.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 387441269cc6..7c99cb4c8e4f 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
@@ -132,7 +132,7 @@ ENTRY(cpu_v6_do_suspend) | |||
132 | mrc p15, 0, r6, c3, c0, 0 @ Domain ID | 132 | mrc p15, 0, r6, c3, c0, 0 @ Domain ID |
133 | mrc p15, 0, r7, c2, c0, 0 @ Translation table base 0 | 133 | mrc p15, 0, r7, c2, c0, 0 @ Translation table base 0 |
134 | mrc p15, 0, r8, c2, c0, 1 @ Translation table base 1 | 134 | mrc p15, 0, r8, c2, c0, 1 @ Translation table base 1 |
135 | mrc p15, 0, r9, c1, c0, 1 @ auxillary control register | 135 | mrc p15, 0, r9, c1, c0, 1 @ auxiliary control register |
136 | mrc p15, 0, r10, c1, c0, 2 @ co-processor access control | 136 | mrc p15, 0, r10, c1, c0, 2 @ co-processor access control |
137 | mrc p15, 0, r11, c1, c0, 0 @ control register | 137 | mrc p15, 0, r11, c1, c0, 0 @ control register |
138 | stmia r0, {r4 - r11} | 138 | stmia r0, {r4 - r11} |
@@ -151,7 +151,7 @@ ENTRY(cpu_v6_do_resume) | |||
151 | mcr p15, 0, r6, c3, c0, 0 @ Domain ID | 151 | mcr p15, 0, r6, c3, c0, 0 @ Domain ID |
152 | mcr p15, 0, r7, c2, c0, 0 @ Translation table base 0 | 152 | mcr p15, 0, r7, c2, c0, 0 @ Translation table base 0 |
153 | mcr p15, 0, r8, c2, c0, 1 @ Translation table base 1 | 153 | mcr p15, 0, r8, c2, c0, 1 @ Translation table base 1 |
154 | mcr p15, 0, r9, c1, c0, 1 @ auxillary control register | 154 | mcr p15, 0, r9, c1, c0, 1 @ auxiliary control register |
155 | mcr p15, 0, r10, c1, c0, 2 @ co-processor access control | 155 | mcr p15, 0, r10, c1, c0, 2 @ co-processor access control |
156 | mcr p15, 0, ip, c2, c0, 2 @ TTB control register | 156 | mcr p15, 0, ip, c2, c0, 2 @ TTB control register |
157 | mcr p15, 0, ip, c7, c5, 4 @ ISB | 157 | mcr p15, 0, ip, c7, c5, 4 @ ISB |