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author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-21 19:42:32 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-10-21 19:42:32 -0400 |
commit | b5153163ed580e00c67bdfecb02b2e3843817b3e (patch) | |
tree | b8c878601f07f5df8f694435857a5f3dcfd75482 /arch/arm/mm/proc-v6.S | |
parent | a8cbf22559ceefdcdfac00701e8e6da7518b7e8e (diff) | |
parent | 6451d7783ba5ff24eb1a544eaa6665b890f30466 (diff) |
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (278 commits)
arm: remove machine_desc.io_pg_offst and .phys_io
arm: use addruart macro to establish debug mappings
arm: return both physical and virtual addresses from addruart
arm/debug: consolidate addruart macros for CONFIG_DEBUG_ICEDCC
ARM: make struct machine_desc definition coherent with its comment
eukrea_mbimxsd-baseboard: Pass the correct GPIO to gpio_free
cpuimx27: fix compile when ULPI is selected
mach-pcm037_eet: fix compile errors
Fixing ethernet driver compilation error for i.MX31 ADS board
cpuimx51: update board support
mx5: add cpuimx51sd module and its baseboard
iomux-mx51: fix GPIO_1_xx 's IOMUX configuration
imx-esdhc: update devices registration
mx51: add resources for SD/MMC on i.MX51
iomux-mx51: fix SD1 and SD2's iomux configuration
clock-mx51: rename CLOCK1 to CLOCK_CCGR for better readability
clock-mx51: factorize clk_set_parent and clk_get_rate
eukrea_mbimxsd: add support for DVI displays
cpuimx25 & cpuimx35: fix OTG port registration in host mode
i.MX31 and i.MX35 : fix errate TLSbo65953 and ENGcm09472
...
Diffstat (limited to 'arch/arm/mm/proc-v6.S')
-rw-r--r-- | arch/arm/mm/proc-v6.S | 49 |
1 files changed, 33 insertions, 16 deletions
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 22aac8515196..59a7e1ffe7bc 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
@@ -30,13 +30,10 @@ | |||
30 | #define TTB_RGN_WT (2 << 3) | 30 | #define TTB_RGN_WT (2 << 3) |
31 | #define TTB_RGN_WB (3 << 3) | 31 | #define TTB_RGN_WB (3 << 3) |
32 | 32 | ||
33 | #ifndef CONFIG_SMP | 33 | #define TTB_FLAGS_UP TTB_RGN_WBWA |
34 | #define TTB_FLAGS TTB_RGN_WBWA | 34 | #define PMD_FLAGS_UP PMD_SECT_WB |
35 | #define PMD_FLAGS PMD_SECT_WB | 35 | #define TTB_FLAGS_SMP TTB_RGN_WBWA|TTB_S |
36 | #else | 36 | #define PMD_FLAGS_SMP PMD_SECT_WBWA|PMD_SECT_S |
37 | #define TTB_FLAGS TTB_RGN_WBWA|TTB_S | ||
38 | #define PMD_FLAGS PMD_SECT_WBWA|PMD_SECT_S | ||
39 | #endif | ||
40 | 37 | ||
41 | ENTRY(cpu_v6_proc_init) | 38 | ENTRY(cpu_v6_proc_init) |
42 | mov pc, lr | 39 | mov pc, lr |
@@ -97,7 +94,8 @@ ENTRY(cpu_v6_switch_mm) | |||
97 | #ifdef CONFIG_MMU | 94 | #ifdef CONFIG_MMU |
98 | mov r2, #0 | 95 | mov r2, #0 |
99 | ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id | 96 | ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id |
100 | orr r0, r0, #TTB_FLAGS | 97 | ALT_SMP(orr r0, r0, #TTB_FLAGS_SMP) |
98 | ALT_UP(orr r0, r0, #TTB_FLAGS_UP) | ||
101 | mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB | 99 | mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB |
102 | mcr p15, 0, r2, c7, c10, 4 @ drain write buffer | 100 | mcr p15, 0, r2, c7, c10, 4 @ drain write buffer |
103 | mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 | 101 | mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 |
@@ -137,7 +135,7 @@ cpu_pj4_name: | |||
137 | 135 | ||
138 | .align | 136 | .align |
139 | 137 | ||
140 | __INIT | 138 | __CPUINIT |
141 | 139 | ||
142 | /* | 140 | /* |
143 | * __v6_setup | 141 | * __v6_setup |
@@ -156,9 +154,11 @@ cpu_pj4_name: | |||
156 | */ | 154 | */ |
157 | __v6_setup: | 155 | __v6_setup: |
158 | #ifdef CONFIG_SMP | 156 | #ifdef CONFIG_SMP |
159 | mrc p15, 0, r0, c1, c0, 1 @ Enable SMP/nAMP mode | 157 | ALT_SMP(mrc p15, 0, r0, c1, c0, 1) @ Enable SMP/nAMP mode |
158 | ALT_UP(nop) | ||
160 | orr r0, r0, #0x20 | 159 | orr r0, r0, #0x20 |
161 | mcr p15, 0, r0, c1, c0, 1 | 160 | ALT_SMP(mcr p15, 0, r0, c1, c0, 1) |
161 | ALT_UP(nop) | ||
162 | #endif | 162 | #endif |
163 | 163 | ||
164 | mov r0, #0 | 164 | mov r0, #0 |
@@ -169,7 +169,8 @@ __v6_setup: | |||
169 | #ifdef CONFIG_MMU | 169 | #ifdef CONFIG_MMU |
170 | mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs | 170 | mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs |
171 | mcr p15, 0, r0, c2, c0, 2 @ TTB control register | 171 | mcr p15, 0, r0, c2, c0, 2 @ TTB control register |
172 | orr r4, r4, #TTB_FLAGS | 172 | ALT_SMP(orr r4, r4, #TTB_FLAGS_SMP) |
173 | ALT_UP(orr r4, r4, #TTB_FLAGS_UP) | ||
173 | mcr p15, 0, r4, c2, c0, 1 @ load TTB1 | 174 | mcr p15, 0, r4, c2, c0, 1 @ load TTB1 |
174 | #endif /* CONFIG_MMU */ | 175 | #endif /* CONFIG_MMU */ |
175 | adr r5, v6_crval | 176 | adr r5, v6_crval |
@@ -192,6 +193,8 @@ __v6_setup: | |||
192 | v6_crval: | 193 | v6_crval: |
193 | crval clear=0x01e0fb7f, mmuset=0x00c0387d, ucset=0x00c0187c | 194 | crval clear=0x01e0fb7f, mmuset=0x00c0387d, ucset=0x00c0187c |
194 | 195 | ||
196 | __INITDATA | ||
197 | |||
195 | .type v6_processor_functions, #object | 198 | .type v6_processor_functions, #object |
196 | ENTRY(v6_processor_functions) | 199 | ENTRY(v6_processor_functions) |
197 | .word v6_early_abort | 200 | .word v6_early_abort |
@@ -205,6 +208,8 @@ ENTRY(v6_processor_functions) | |||
205 | .word cpu_v6_set_pte_ext | 208 | .word cpu_v6_set_pte_ext |
206 | .size v6_processor_functions, . - v6_processor_functions | 209 | .size v6_processor_functions, . - v6_processor_functions |
207 | 210 | ||
211 | .section ".rodata" | ||
212 | |||
208 | .type cpu_arch_name, #object | 213 | .type cpu_arch_name, #object |
209 | cpu_arch_name: | 214 | cpu_arch_name: |
210 | .asciz "armv6" | 215 | .asciz "armv6" |
@@ -225,10 +230,16 @@ cpu_elf_name: | |||
225 | __v6_proc_info: | 230 | __v6_proc_info: |
226 | .long 0x0007b000 | 231 | .long 0x0007b000 |
227 | .long 0x0007f000 | 232 | .long 0x0007f000 |
228 | .long PMD_TYPE_SECT | \ | 233 | ALT_SMP(.long \ |
234 | PMD_TYPE_SECT | \ | ||
229 | PMD_SECT_AP_WRITE | \ | 235 | PMD_SECT_AP_WRITE | \ |
230 | PMD_SECT_AP_READ | \ | 236 | PMD_SECT_AP_READ | \ |
231 | PMD_FLAGS | 237 | PMD_FLAGS_SMP) |
238 | ALT_UP(.long \ | ||
239 | PMD_TYPE_SECT | \ | ||
240 | PMD_SECT_AP_WRITE | \ | ||
241 | PMD_SECT_AP_READ | \ | ||
242 | PMD_FLAGS_UP) | ||
232 | .long PMD_TYPE_SECT | \ | 243 | .long PMD_TYPE_SECT | \ |
233 | PMD_SECT_XN | \ | 244 | PMD_SECT_XN | \ |
234 | PMD_SECT_AP_WRITE | \ | 245 | PMD_SECT_AP_WRITE | \ |
@@ -249,10 +260,16 @@ __v6_proc_info: | |||
249 | __pj4_v6_proc_info: | 260 | __pj4_v6_proc_info: |
250 | .long 0x560f5810 | 261 | .long 0x560f5810 |
251 | .long 0xff0ffff0 | 262 | .long 0xff0ffff0 |
252 | .long PMD_TYPE_SECT | \ | 263 | ALT_SMP(.long \ |
264 | PMD_TYPE_SECT | \ | ||
265 | PMD_SECT_AP_WRITE | \ | ||
266 | PMD_SECT_AP_READ | \ | ||
267 | PMD_FLAGS_SMP) | ||
268 | ALT_UP(.long \ | ||
269 | PMD_TYPE_SECT | \ | ||
253 | PMD_SECT_AP_WRITE | \ | 270 | PMD_SECT_AP_WRITE | \ |
254 | PMD_SECT_AP_READ | \ | 271 | PMD_SECT_AP_READ | \ |
255 | PMD_FLAGS | 272 | PMD_FLAGS_UP) |
256 | .long PMD_TYPE_SECT | \ | 273 | .long PMD_TYPE_SECT | \ |
257 | PMD_SECT_XN | \ | 274 | PMD_SECT_XN | \ |
258 | PMD_SECT_AP_WRITE | \ | 275 | PMD_SECT_AP_WRITE | \ |