diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-07-26 07:22:12 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-07-27 05:48:42 -0400 |
commit | 9ca03a21e320a6bf44559323527aba704bcc8772 (patch) | |
tree | c3422c49decfdca220c0088938546c49ee71ba64 /arch/arm/mm/proc-mohawk.S | |
parent | b8ab5397bcbd92e3fd4a9770e0bf59315fa38dab (diff) |
ARM: Factor out common code from cpu_proc_fin()
All implementations of cpu_proc_fin() start by disabling interrupts
and then flush caches. Rather than have every processors proc_fin()
implementation do this, move it out into generic code - and move the
cache flush past setup_mm_for_reboot() (so it can benefit from having
caches still enabled.)
This allows cpu_proc_fin() to become independent of the L1/L2 cache
types, and eventually move the L2 cache flushing into the L2 support
code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/proc-mohawk.S')
-rw-r--r-- | arch/arm/mm/proc-mohawk.S | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S index caa31154e7db..5f6892fcc167 100644 --- a/arch/arm/mm/proc-mohawk.S +++ b/arch/arm/mm/proc-mohawk.S | |||
@@ -51,15 +51,11 @@ ENTRY(cpu_mohawk_proc_init) | |||
51 | * cpu_mohawk_proc_fin() | 51 | * cpu_mohawk_proc_fin() |
52 | */ | 52 | */ |
53 | ENTRY(cpu_mohawk_proc_fin) | 53 | ENTRY(cpu_mohawk_proc_fin) |
54 | stmfd sp!, {lr} | ||
55 | mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE | ||
56 | msr cpsr_c, ip | ||
57 | bl mohawk_flush_kern_cache_all | ||
58 | mrc p15, 0, r0, c1, c0, 0 @ ctrl register | 54 | mrc p15, 0, r0, c1, c0, 0 @ ctrl register |
59 | bic r0, r0, #0x1800 @ ...iz........... | 55 | bic r0, r0, #0x1800 @ ...iz........... |
60 | bic r0, r0, #0x0006 @ .............ca. | 56 | bic r0, r0, #0x0006 @ .............ca. |
61 | mcr p15, 0, r0, c1, c0, 0 @ disable caches | 57 | mcr p15, 0, r0, c1, c0, 0 @ disable caches |
62 | ldmfd sp!, {pc} | 58 | mov pc, lr |
63 | 59 | ||
64 | /* | 60 | /* |
65 | * cpu_mohawk_reset(loc) | 61 | * cpu_mohawk_reset(loc) |