ARM: 5727/1: Pass IFSR register to do_PrefetchAbort()

Instruction fault status register, IFSR, was introduced on ARMv6 to
provide status information about the last insturction fault. It
needed for proper prefetch abort handling.

Now we have three prefetch abort model:

  * legacy - for CPUs before ARMv6. They doesn't provide neither
    IFSR nor IFAR. We simulate IFSR with section translation fault
    status for them to generalize code;
  * ARMv6 - provides IFSR, but not IFAR;
  * ARMv7 - provides both IFSR and IFAR.

Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
index 0fe1f8fc3488..d0d7795200fc 100644
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -499,7 +499,7 @@ feroceon_crval:
         .type   feroceon_processor_functions, #object
 feroceon_processor_functions:
         .word   v5t_early_abort
-        .word   pabort_noifar
+        .word   legacy_pabort
         .word   cpu_feroceon_proc_init
         .word   cpu_feroceon_proc_fin
         .word   cpu_feroceon_reset