diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-07-26 07:22:12 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-07-27 05:48:42 -0400 |
commit | 9ca03a21e320a6bf44559323527aba704bcc8772 (patch) | |
tree | c3422c49decfdca220c0088938546c49ee71ba64 /arch/arm/mm/proc-arm946.S | |
parent | b8ab5397bcbd92e3fd4a9770e0bf59315fa38dab (diff) |
ARM: Factor out common code from cpu_proc_fin()
All implementations of cpu_proc_fin() start by disabling interrupts
and then flush caches. Rather than have every processors proc_fin()
implementation do this, move it out into generic code - and move the
cache flush past setup_mm_for_reboot() (so it can benefit from having
caches still enabled.)
This allows cpu_proc_fin() to become independent of the L1/L2 cache
types, and eventually move the L2 cache flushing into the L2 support
code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/proc-arm946.S')
-rw-r--r-- | arch/arm/mm/proc-arm946.S | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S index 1664b6aaff79..249a6053760a 100644 --- a/arch/arm/mm/proc-arm946.S +++ b/arch/arm/mm/proc-arm946.S | |||
@@ -44,15 +44,11 @@ ENTRY(cpu_arm946_switch_mm) | |||
44 | * cpu_arm946_proc_fin() | 44 | * cpu_arm946_proc_fin() |
45 | */ | 45 | */ |
46 | ENTRY(cpu_arm946_proc_fin) | 46 | ENTRY(cpu_arm946_proc_fin) |
47 | stmfd sp!, {lr} | ||
48 | mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE | ||
49 | msr cpsr_c, ip | ||
50 | bl arm946_flush_kern_cache_all | ||
51 | mrc p15, 0, r0, c1, c0, 0 @ ctrl register | 47 | mrc p15, 0, r0, c1, c0, 0 @ ctrl register |
52 | bic r0, r0, #0x00001000 @ i-cache | 48 | bic r0, r0, #0x00001000 @ i-cache |
53 | bic r0, r0, #0x00000004 @ d-cache | 49 | bic r0, r0, #0x00000004 @ d-cache |
54 | mcr p15, 0, r0, c1, c0, 0 @ disable caches | 50 | mcr p15, 0, r0, c1, c0, 0 @ disable caches |
55 | ldmfd sp!, {pc} | 51 | mov pc, lr |
56 | 52 | ||
57 | /* | 53 | /* |
58 | * cpu_arm946_reset(loc) | 54 | * cpu_arm946_reset(loc) |