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authorLinus Torvalds <torvalds@linux-foundation.org>2009-12-17 18:53:41 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2009-12-17 18:53:41 -0500
commita695bc683609a2b815915e4cfcd93e4ccc0e2cae (patch)
tree824d6b35783317f929fe13a9efcc8a35d5e00311 /arch/arm/mm/proc-arm926.S
parent6485536bcf499839a54dcda8a8d47ea0bd29b375 (diff)
parent6665398afafcb1c75d933c1452a9010644aba3e6 (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: PCMCIA: fix pxa2xx_lubbock modular build error [ARM] Update mach-types [ARM] pxa: fix no reference of cpu_is_pxa25x() in devices.c [ARM] pxa/cm-x300: add PWM backlight support revert "[ARM] pxa/cm-x300: add PWM backlight support" ARM: use flush_kernel_dcache_area() for dmabounce ARM: add size argument to __cpuc_flush_dcache_page ARM: 5848/1: kill flush_ioremap_region() ARM: cache-l2x0: make better use of background cache handling ARM: cache-l2x0: avoid taking spinlock for every iteration [ARM] Kirkwood: Add LaCie Network Space v2 support ARM: dove: fix the mm mmu flags of the pj4 procinfo
Diffstat (limited to 'arch/arm/mm/proc-arm926.S')
-rw-r--r--arch/arm/mm/proc-arm926.S11
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 1c4848704bb3..64db6e275a44 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -214,15 +214,16 @@ ENTRY(arm926_coherent_user_range)
214 mov pc, lr 214 mov pc, lr
215 215
216/* 216/*
217 * flush_kern_dcache_page(void *page) 217 * flush_kern_dcache_area(void *addr, size_t size)
218 * 218 *
219 * Ensure no D cache aliasing occurs, either with itself or 219 * Ensure no D cache aliasing occurs, either with itself or
220 * the I cache 220 * the I cache
221 * 221 *
222 * - addr - page aligned address 222 * - addr - kernel address
223 * - size - region size
223 */ 224 */
224ENTRY(arm926_flush_kern_dcache_page) 225ENTRY(arm926_flush_kern_dcache_area)
225 add r1, r0, #PAGE_SZ 226 add r1, r0, r1
2261: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry 2271: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
227 add r0, r0, #CACHE_DLINESIZE 228 add r0, r0, #CACHE_DLINESIZE
228 cmp r0, r1 229 cmp r0, r1
@@ -309,7 +310,7 @@ ENTRY(arm926_cache_fns)
309 .long arm926_flush_user_cache_range 310 .long arm926_flush_user_cache_range
310 .long arm926_coherent_kern_range 311 .long arm926_coherent_kern_range
311 .long arm926_coherent_user_range 312 .long arm926_coherent_user_range
312 .long arm926_flush_kern_dcache_page 313 .long arm926_flush_kern_dcache_area
313 .long arm926_dma_inv_range 314 .long arm926_dma_inv_range
314 .long arm926_dma_clean_range 315 .long arm926_dma_clean_range
315 .long arm926_dma_flush_range 316 .long arm926_dma_flush_range