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authorKirill A. Shutemov <kirill@shutemov.name>2009-09-25 08:39:47 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-10-02 17:34:32 -0400
commit4fb2847437d871fe579f820ceb18031db3359901 (patch)
treee2015dbc54178dd114eb0c41fa5a29d89dd15b41 /arch/arm/mm/proc-arm925.S
parent6806bfe18fca92e2001538b84cab5f63c5ea4bed (diff)
ARM: 5727/1: Pass IFSR register to do_PrefetchAbort()
Instruction fault status register, IFSR, was introduced on ARMv6 to provide status information about the last insturction fault. It needed for proper prefetch abort handling. Now we have three prefetch abort model: * legacy - for CPUs before ARMv6. They doesn't provide neither IFSR nor IFAR. We simulate IFSR with section translation fault status for them to generalize code; * ARMv6 - provides IFSR, but not IFAR; * ARMv7 - provides both IFSR and IFAR. Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/proc-arm925.S')
-rw-r--r--arch/arm/mm/proc-arm925.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 2724526d89c1..cb53435a85ae 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -462,7 +462,7 @@ arm925_crval:
462 .type arm925_processor_functions, #object 462 .type arm925_processor_functions, #object
463arm925_processor_functions: 463arm925_processor_functions:
464 .word v4t_early_abort 464 .word v4t_early_abort
465 .word pabort_noifar 465 .word legacy_pabort
466 .word cpu_arm925_proc_init 466 .word cpu_arm925_proc_init
467 .word cpu_arm925_proc_fin 467 .word cpu_arm925_proc_fin
468 .word cpu_arm925_reset 468 .word cpu_arm925_reset