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authorWill Deacon <will.deacon@arm.com>2011-11-15 08:25:04 -0500
committerWill Deacon <will.deacon@arm.com>2011-12-06 09:04:14 -0500
commit1a4baafa7d203da1cceb302c2df38f0fea1c17a1 (patch)
treef64d1b22be6f3255ccb73470a9799890972bd670 /arch/arm/mm/proc-arm925.S
parente6eadc67873d5f363c864cd7723104e7d47dcb44 (diff)
ARM: proc-*.S: place cpu_reset functions into .idmap.text section
The CPU reset functions disable the MMU and therefore must be executed with an identity mapping in place. This patch places the CPU reset functions into the .idmap.text section, causing the idmap code to include them as part of the identity mapping. Acked-by: Dave Martin <dave.martin@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/mm/proc-arm925.S')
-rw-r--r--arch/arm/mm/proc-arm925.S3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 51d494be057e..9dccd9a365b3 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -108,6 +108,7 @@ ENTRY(cpu_arm925_proc_fin)
108 * loc: location to jump to for soft reset 108 * loc: location to jump to for soft reset
109 */ 109 */
110 .align 5 110 .align 5
111 .pushsection .idmap.text, "ax"
111ENTRY(cpu_arm925_reset) 112ENTRY(cpu_arm925_reset)
112 /* Send software reset to MPU and DSP */ 113 /* Send software reset to MPU and DSP */
113 mov ip, #0xff000000 114 mov ip, #0xff000000
@@ -115,6 +116,8 @@ ENTRY(cpu_arm925_reset)
115 orr ip, ip, #0x0000ce00 116 orr ip, ip, #0x0000ce00
116 mov r4, #1 117 mov r4, #1
117 strh r4, [ip, #0x10] 118 strh r4, [ip, #0x10]
119ENDPROC(cpu_arm925_reset)
120 .popsection
118 121
119 mov ip, #0 122 mov ip, #0
120 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 123 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches