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authorRussell King <rmk+kernel@arm.linux.org.uk>2009-11-26 11:24:19 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-02-15 10:22:23 -0500
commit702b94bff3c50542a6e4ab9a4f4cef093262fe65 (patch)
tree2ae468b08de2aeb0e65ab3830c40c7a84dbbdb5e /arch/arm/mm/proc-arm925.S
parenta9c9147eb9b1dba0ce567a41897c7773b4d1b0bc (diff)
ARM: dma-mapping: remove dmac_clean_range and dmac_inv_range
These are now unused, and so can be removed. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-By: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mm/proc-arm925.S')
-rw-r--r--arch/arm/mm/proc-arm925.S6
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 7c01c5d1108c..3c6cffe400f6 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -283,7 +283,7 @@ ENTRY(arm925_flush_kern_dcache_area)
283 * 283 *
284 * (same as v4wb) 284 * (same as v4wb)
285 */ 285 */
286ENTRY(arm925_dma_inv_range) 286arm925_dma_inv_range:
287#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH 287#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
288 tst r0, #CACHE_DLINESIZE - 1 288 tst r0, #CACHE_DLINESIZE - 1
289 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry 289 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
@@ -308,7 +308,7 @@ ENTRY(arm925_dma_inv_range)
308 * 308 *
309 * (same as v4wb) 309 * (same as v4wb)
310 */ 310 */
311ENTRY(arm925_dma_clean_range) 311arm925_dma_clean_range:
312#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH 312#ifndef CONFIG_CPU_DCACHE_WRITETHROUGH
313 bic r0, r0, #CACHE_DLINESIZE - 1 313 bic r0, r0, #CACHE_DLINESIZE - 1
3141: mcr p15, 0, r0, c7, c10, 1 @ clean D entry 3141: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
@@ -374,8 +374,6 @@ ENTRY(arm925_cache_fns)
374 .long arm925_flush_kern_dcache_area 374 .long arm925_flush_kern_dcache_area
375 .long arm925_dma_map_area 375 .long arm925_dma_map_area
376 .long arm925_dma_unmap_area 376 .long arm925_dma_unmap_area
377 .long arm925_dma_inv_range
378 .long arm925_dma_clean_range
379 .long arm925_dma_flush_range 377 .long arm925_dma_flush_range
380 378
381ENTRY(cpu_arm925_dcache_clean_area) 379ENTRY(cpu_arm925_dcache_clean_area)