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author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-07-02 18:04:12 -0400 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-07-02 18:04:12 -0400 |
commit | a8c4c20dfa8b28a3c99e33c639d9c2ea5657741e (patch) | |
tree | 887b64d29b5a46d9ab2ca1267d8a2f05b5845561 /arch/arm/mm/proc-arm920.S | |
parent | 168d04b3b4de7723eb73b3cffc9cb75224e0f393 (diff) | |
parent | 2dc7667b9d0674db6572723356fe3857031101a4 (diff) |
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (44 commits)
[ARM] 3541/2: workaround for PXA27x erratum E7
[ARM] nommu: provide a way for correct control register value selection
[ARM] 3705/1: add supersection support to ioremap()
[ARM] 3707/1: iwmmxt: use the generic thread notifier infrastructure
[ARM] 3706/2: ep93xx: add cirrus logic edb9315a support
[ARM] 3704/1: format IOP Kconfig with tabs, create more consistency
[ARM] 3703/1: Add help description for ARCH_EP80219
[ARM] 3678/1: MMC: Make OMAP MMC work
[ARM] 3677/1: OMAP: Update H2 defconfig
[ARM] 3676/1: ARM: OMAP: Fix dmtimers and timer32k to compile on OMAP1
[ARM] Add section support to ioremap
[ARM] Fix sa11x0 SDRAM selection
[ARM] Set bit 4 on section mappings correctly depending on CPU
[ARM] 3666/1: TRIZEPS4 [1/5] core
ARM: OMAP: Multiplexing for 24xx GPMC wait pin monitoring
ARM: OMAP: Fix SRAM to use MT_MEMORY instead of MT_DEVICE
ARM: OMAP: Update dmtimers
ARM: OMAP: Make clock variables static
ARM: OMAP: Fix GPMC compilation when DEBUG is defined
ARM: OMAP: Mux updates for external DMA and GPIO
...
Diffstat (limited to 'arch/arm/mm/proc-arm920.S')
-rw-r--r-- | arch/arm/mm/proc-arm920.S | 33 |
1 files changed, 11 insertions, 22 deletions
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S index 6f0db29ab842..4adb46b3a4e0 100644 --- a/arch/arm/mm/proc-arm920.S +++ b/arch/arm/mm/proc-arm920.S | |||
@@ -390,11 +390,11 @@ __arm920_setup: | |||
390 | #ifdef CONFIG_MMU | 390 | #ifdef CONFIG_MMU |
391 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 | 391 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 |
392 | #endif | 392 | #endif |
393 | adr r5, arm920_crval | ||
394 | ldmia r5, {r5, r6} | ||
393 | mrc p15, 0, r0, c1, c0 @ get control register v4 | 395 | mrc p15, 0, r0, c1, c0 @ get control register v4 |
394 | ldr r5, arm920_cr1_clear | ||
395 | bic r0, r0, r5 | 396 | bic r0, r0, r5 |
396 | ldr r5, arm920_cr1_set | 397 | orr r0, r0, r6 |
397 | orr r0, r0, r5 | ||
398 | mov pc, lr | 398 | mov pc, lr |
399 | .size __arm920_setup, . - __arm920_setup | 399 | .size __arm920_setup, . - __arm920_setup |
400 | 400 | ||
@@ -404,12 +404,9 @@ __arm920_setup: | |||
404 | * ..11 0001 ..11 0101 | 404 | * ..11 0001 ..11 0101 |
405 | * | 405 | * |
406 | */ | 406 | */ |
407 | .type arm920_cr1_clear, #object | 407 | .type arm920_crval, #object |
408 | .type arm920_cr1_set, #object | 408 | arm920_crval: |
409 | arm920_cr1_clear: | 409 | crval clear=0x00003f3f, mmuset=0x00003135, ucset=0x00001130 |
410 | .word 0x3f3f | ||
411 | arm920_cr1_set: | ||
412 | .word 0x3135 | ||
413 | 410 | ||
414 | __INITDATA | 411 | __INITDATA |
415 | 412 | ||
@@ -443,19 +440,7 @@ cpu_elf_name: | |||
443 | 440 | ||
444 | .type cpu_arm920_name, #object | 441 | .type cpu_arm920_name, #object |
445 | cpu_arm920_name: | 442 | cpu_arm920_name: |
446 | .ascii "ARM920T" | 443 | .asciz "ARM920T" |
447 | #ifndef CONFIG_CPU_ICACHE_DISABLE | ||
448 | .ascii "i" | ||
449 | #endif | ||
450 | #ifndef CONFIG_CPU_DCACHE_DISABLE | ||
451 | .ascii "d" | ||
452 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
453 | .ascii "(wt)" | ||
454 | #else | ||
455 | .ascii "(wb)" | ||
456 | #endif | ||
457 | #endif | ||
458 | .ascii "\0" | ||
459 | .size cpu_arm920_name, . - cpu_arm920_name | 444 | .size cpu_arm920_name, . - cpu_arm920_name |
460 | 445 | ||
461 | .align | 446 | .align |
@@ -472,6 +457,10 @@ __arm920_proc_info: | |||
472 | PMD_BIT4 | \ | 457 | PMD_BIT4 | \ |
473 | PMD_SECT_AP_WRITE | \ | 458 | PMD_SECT_AP_WRITE | \ |
474 | PMD_SECT_AP_READ | 459 | PMD_SECT_AP_READ |
460 | .long PMD_TYPE_SECT | \ | ||
461 | PMD_BIT4 | \ | ||
462 | PMD_SECT_AP_WRITE | \ | ||
463 | PMD_SECT_AP_READ | ||
475 | b __arm920_setup | 464 | b __arm920_setup |
476 | .long cpu_arch_name | 465 | .long cpu_arch_name |
477 | .long cpu_elf_name | 466 | .long cpu_elf_name |