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authorRussell King <rmk+kernel@arm.linux.org.uk>2014-06-30 11:29:12 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-07-18 07:29:04 -0400
commit6ebbf2ce437b33022d30badd49dc94d33ecfa498 (patch)
treebc015e35b456a28bb0e501803a454dc0c0d3291a /arch/arm/mm/proc-arm740.S
parentaf040ffc9ba1e079ee4c0748aff64fa3d4716fa5 (diff)
ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+
ARMv6 and greater introduced a new instruction ("bx") which can be used to return from function calls. Recent CPUs perform better when the "bx lr" instruction is used rather than the "mov pc, lr" instruction, and this sequence is strongly recommended to be used by the ARM architecture manual (section A.4.1.1). We provide a new macro "ret" with all its variants for the condition code which will resolve to the appropriate instruction. Rather than doing this piecemeal, and miss some instances, change all the "mov pc" instances to use the new macro, with the exception of the "movs" instruction and the kprobes code. This allows us to detect the "mov pc, lr" case and fix it up - and also gives us the possibility of deploying this for other registers depending on the CPU selection. Reported-by: Will Deacon <will.deacon@arm.com> Tested-by: Stephen Warren <swarren@nvidia.com> # Tegra Jetson TK1 Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> # mioa701_bootresume.S Tested-by: Andrew Lunn <andrew@lunn.ch> # Kirkwood Tested-by: Shawn Guo <shawn.guo@freescale.com> Tested-by: Tony Lindgren <tony@atomide.com> # OMAPs Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> # Armada XP, 375, 385 Acked-by: Sekhar Nori <nsekhar@ti.com> # DaVinci Acked-by: Christoffer Dall <christoffer.dall@linaro.org> # kvm/hyp Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> # PXA3xx Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> # Xen Tested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> # ARMv7M Tested-by: Simon Horman <horms+renesas@verge.net.au> # Shmobile Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/proc-arm740.S')
-rw-r--r--arch/arm/mm/proc-arm740.S8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S
index 9b0ae90cbf17..ac1ea6b3bce4 100644
--- a/arch/arm/mm/proc-arm740.S
+++ b/arch/arm/mm/proc-arm740.S
@@ -32,7 +32,7 @@ ENTRY(cpu_arm740_proc_init)
32ENTRY(cpu_arm740_do_idle) 32ENTRY(cpu_arm740_do_idle)
33ENTRY(cpu_arm740_dcache_clean_area) 33ENTRY(cpu_arm740_dcache_clean_area)
34ENTRY(cpu_arm740_switch_mm) 34ENTRY(cpu_arm740_switch_mm)
35 mov pc, lr 35 ret lr
36 36
37/* 37/*
38 * cpu_arm740_proc_fin() 38 * cpu_arm740_proc_fin()
@@ -42,7 +42,7 @@ ENTRY(cpu_arm740_proc_fin)
42 bic r0, r0, #0x3f000000 @ bank/f/lock/s 42 bic r0, r0, #0x3f000000 @ bank/f/lock/s
43 bic r0, r0, #0x0000000c @ w-buffer/cache 43 bic r0, r0, #0x0000000c @ w-buffer/cache
44 mcr p15, 0, r0, c1, c0, 0 @ disable caches 44 mcr p15, 0, r0, c1, c0, 0 @ disable caches
45 mov pc, lr 45 ret lr
46 46
47/* 47/*
48 * cpu_arm740_reset(loc) 48 * cpu_arm740_reset(loc)
@@ -56,7 +56,7 @@ ENTRY(cpu_arm740_reset)
56 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register 56 mrc p15, 0, ip, c1, c0, 0 @ get ctrl register
57 bic ip, ip, #0x0000000c @ ............wc.. 57 bic ip, ip, #0x0000000c @ ............wc..
58 mcr p15, 0, ip, c1, c0, 0 @ ctrl register 58 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
59 mov pc, r0 59 ret r0
60ENDPROC(cpu_arm740_reset) 60ENDPROC(cpu_arm740_reset)
61 .popsection 61 .popsection
62 62
@@ -115,7 +115,7 @@ __arm740_setup:
115 @ need some benchmark 115 @ need some benchmark
116 orr r0, r0, #0x0000000d @ MPU/Cache/WB 116 orr r0, r0, #0x0000000d @ MPU/Cache/WB
117 117
118 mov pc, lr 118 ret lr
119 119
120 .size __arm740_setup, . - __arm740_setup 120 .size __arm740_setup, . - __arm740_setup
121 121