ARM: 5727/1: Pass IFSR register to do_PrefetchAbort()

Instruction fault status register, IFSR, was introduced on ARMv6 to
provide status information about the last insturction fault. It
needed for proper prefetch abort handling.

Now we have three prefetch abort model:

  * legacy - for CPUs before ARMv6. They doesn't provide neither
    IFSR nor IFAR. We simulate IFSR with section translation fault
    status for them to generalize code;
  * ARMv6 - provides IFSR, but not IFAR;
  * ARMv7 - provides both IFSR and IFAR.

Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 2 insertions, 2 deletions

diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index 80d6e1de069a..3f9cd3d8f6d5 100644
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -278,7 +278,7 @@ __arm7_setup:	mov	r0, #0
                 .type   arm6_processor_functions, #object
 ENTRY(arm6_processor_functions)
                 .word   cpu_arm6_data_abort
-                .word   pabort_noifar
+                .word   legacy_pabort
                 .word   cpu_arm6_proc_init
                 .word   cpu_arm6_proc_fin
                 .word   cpu_arm6_reset
@@ -295,7 +295,7 @@ ENTRY(arm6_processor_functions)
                 .type   arm7_processor_functions, #object
 ENTRY(arm7_processor_functions)
                 .word   cpu_arm7_data_abort
-                .word   pabort_noifar
+                .word   legacy_pabort
                 .word   cpu_arm7_proc_init
                 .word   cpu_arm7_proc_fin
                 .word   cpu_arm7_reset