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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-10-09 16:31:56 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-10-09 16:31:56 -0400
commit6a4690c22f5da1eb1c898b61b6a80da52fbd976f (patch)
treea03891a32abe0da191fb765fe669a597e07423c6 /arch/arm/mm/proc-arm1026.S
parent90bb28b0644f7324f8bd1feb27b35146e6785ba2 (diff)
parent8ec53663d2698076468b3e1edc4e1b418bd54de3 (diff)
Merge branch 'ptebits' into devel
Conflicts: arch/arm/Kconfig
Diffstat (limited to 'arch/arm/mm/proc-arm1026.S')
-rw-r--r--arch/arm/mm/proc-arm1026.S26
1 files changed, 2 insertions, 24 deletions
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 77a1babd421c..ad961a897f6e 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -18,7 +18,7 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <asm/assembler.h> 19#include <asm/assembler.h>
20#include <asm/asm-offsets.h> 20#include <asm/asm-offsets.h>
21#include <asm/elf.h> 21#include <asm/hwcap.h>
22#include <asm/pgtable-hwdef.h> 22#include <asm/pgtable-hwdef.h>
23#include <asm/pgtable.h> 23#include <asm/pgtable.h>
24#include <asm/ptrace.h> 24#include <asm/ptrace.h>
@@ -354,29 +354,7 @@ ENTRY(cpu_arm1026_switch_mm)
354 .align 5 354 .align 5
355ENTRY(cpu_arm1026_set_pte_ext) 355ENTRY(cpu_arm1026_set_pte_ext)
356#ifdef CONFIG_MMU 356#ifdef CONFIG_MMU
357 str r1, [r0], #-2048 @ linux version 357 armv3_set_pte_ext
358
359 eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
360
361 bic r2, r1, #PTE_SMALL_AP_MASK
362 bic r2, r2, #PTE_TYPE_MASK
363 orr r2, r2, #PTE_TYPE_SMALL
364
365 tst r1, #L_PTE_USER @ User?
366 orrne r2, r2, #PTE_SMALL_AP_URO_SRW
367
368 tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty?
369 orreq r2, r2, #PTE_SMALL_AP_UNO_SRW
370
371 tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young?
372 movne r2, #0
373
374#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
375 eor r3, r1, #0x0a @ C & small page?
376 tst r3, #0x0b
377 biceq r2, r2, #4
378#endif
379 str r2, [r0] @ hardware version
380 mov r0, r0 358 mov r0, r0
381#ifndef CONFIG_CPU_DCACHE_DISABLE 359#ifndef CONFIG_CPU_DCACHE_DISABLE
382 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 360 mcr p15, 0, r0, c7, c10, 1 @ clean D entry