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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-07-01 15:43:57 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-07-01 15:43:57 -0400
commit3f8efdbe73a5bc96e006b2379a8c8d1d8ef52a9d (patch)
tree9171fa7f40177ef34cdcf44b83c9e57687a47ec5 /arch/arm/mm/proc-arm1026.S
parenta069c896d0d6c028581089da7a9a9037a63c2803 (diff)
parent22b1908610dd7ff68471cd4fbd383dbdfe5e0ecd (diff)
Merge nommu branch
Diffstat (limited to 'arch/arm/mm/proc-arm1026.S')
-rw-r--r--arch/arm/mm/proc-arm1026.S15
1 files changed, 6 insertions, 9 deletions
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S
index 72b75d9c712a..0668bfbac67b 100644
--- a/arch/arm/mm/proc-arm1026.S
+++ b/arch/arm/mm/proc-arm1026.S
@@ -399,11 +399,11 @@ __arm1026_setup:
399 mov r0, #4 @ explicitly disable writeback 399 mov r0, #4 @ explicitly disable writeback
400 mcr p15, 7, r0, c15, c0, 0 400 mcr p15, 7, r0, c15, c0, 0
401#endif 401#endif
402 adr r5, arm1026_crval
403 ldmia r5, {r5, r6}
402 mrc p15, 0, r0, c1, c0 @ get control register v4 404 mrc p15, 0, r0, c1, c0 @ get control register v4
403 ldr r5, arm1026_cr1_clear
404 bic r0, r0, r5 405 bic r0, r0, r5
405 ldr r5, arm1026_cr1_set 406 orr r0, r0, r6
406 orr r0, r0, r5
407#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN 407#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
408 orr r0, r0, #0x4000 @ .R.. .... .... .... 408 orr r0, r0, #0x4000 @ .R.. .... .... ....
409#endif 409#endif
@@ -416,12 +416,9 @@ __arm1026_setup:
416 * .011 1001 ..11 0101 416 * .011 1001 ..11 0101
417 * 417 *
418 */ 418 */
419 .type arm1026_cr1_clear, #object 419 .type arm1026_crval, #object
420 .type arm1026_cr1_set, #object 420arm1026_crval:
421arm1026_cr1_clear: 421 crval clear=0x00007f3f, mmuset=0x00003935, ucset=0x00001934
422 .word 0x7f3f
423arm1026_cr1_set:
424 .word 0x3935
425 422
426 __INITDATA 423 __INITDATA
427 424