diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-11-26 07:56:21 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-12-14 09:53:22 -0500 |
commit | 2c9b9c8490b60428fa2d1c64042f7c7caed93940 (patch) | |
tree | c8af289af8c801193eea924db0cd81f09068ddb9 /arch/arm/mm/proc-arm1020e.S | |
parent | ccaf5f05b218e5eb41e2f5cdfd26b18dce4a0218 (diff) |
ARM: add size argument to __cpuc_flush_dcache_page
... and rename the function since it no longer operates on just
pages.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/proc-arm1020e.S')
-rw-r--r-- | arch/arm/mm/proc-arm1020e.S | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index 7453b75dcea5..41fe25d234f5 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S | |||
@@ -225,17 +225,18 @@ ENTRY(arm1020e_coherent_user_range) | |||
225 | mov pc, lr | 225 | mov pc, lr |
226 | 226 | ||
227 | /* | 227 | /* |
228 | * flush_kern_dcache_page(void *page) | 228 | * flush_kern_dcache_area(void *addr, size_t size) |
229 | * | 229 | * |
230 | * Ensure no D cache aliasing occurs, either with itself or | 230 | * Ensure no D cache aliasing occurs, either with itself or |
231 | * the I cache | 231 | * the I cache |
232 | * | 232 | * |
233 | * - page - page aligned address | 233 | * - addr - kernel address |
234 | * - size - region size | ||
234 | */ | 235 | */ |
235 | ENTRY(arm1020e_flush_kern_dcache_page) | 236 | ENTRY(arm1020e_flush_kern_dcache_area) |
236 | mov ip, #0 | 237 | mov ip, #0 |
237 | #ifndef CONFIG_CPU_DCACHE_DISABLE | 238 | #ifndef CONFIG_CPU_DCACHE_DISABLE |
238 | add r1, r0, #PAGE_SZ | 239 | add r1, r0, r1 |
239 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry | 240 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry |
240 | add r0, r0, #CACHE_DLINESIZE | 241 | add r0, r0, #CACHE_DLINESIZE |
241 | cmp r0, r1 | 242 | cmp r0, r1 |
@@ -321,7 +322,7 @@ ENTRY(arm1020e_cache_fns) | |||
321 | .long arm1020e_flush_user_cache_range | 322 | .long arm1020e_flush_user_cache_range |
322 | .long arm1020e_coherent_kern_range | 323 | .long arm1020e_coherent_kern_range |
323 | .long arm1020e_coherent_user_range | 324 | .long arm1020e_coherent_user_range |
324 | .long arm1020e_flush_kern_dcache_page | 325 | .long arm1020e_flush_kern_dcache_area |
325 | .long arm1020e_dma_inv_range | 326 | .long arm1020e_dma_inv_range |
326 | .long arm1020e_dma_clean_range | 327 | .long arm1020e_dma_clean_range |
327 | .long arm1020e_dma_flush_range | 328 | .long arm1020e_dma_flush_range |