Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (44 commits)
  [ARM] 3541/2: workaround for PXA27x erratum E7
  [ARM] nommu: provide a way for correct control register value selection
  [ARM] 3705/1: add supersection support to ioremap()
  [ARM] 3707/1: iwmmxt: use the generic thread notifier infrastructure
  [ARM] 3706/2: ep93xx: add cirrus logic edb9315a support
  [ARM] 3704/1: format IOP Kconfig with tabs, create more consistency
  [ARM] 3703/1: Add help description for ARCH_EP80219
  [ARM] 3678/1: MMC: Make OMAP MMC work
  [ARM] 3677/1: OMAP: Update H2 defconfig
  [ARM] 3676/1: ARM: OMAP: Fix dmtimers and timer32k to compile on OMAP1
  [ARM] Add section support to ioremap
  [ARM] Fix sa11x0 SDRAM selection
  [ARM] Set bit 4 on section mappings correctly depending on CPU
  [ARM] 3666/1: TRIZEPS4 [1/5] core
  ARM: OMAP: Multiplexing for 24xx GPMC wait pin monitoring
  ARM: OMAP: Fix SRAM to use MT_MEMORY instead of MT_DEVICE
  ARM: OMAP: Update dmtimers
  ARM: OMAP: Make clock variables static
  ARM: OMAP: Fix GPMC compilation when DEBUG is defined
  ARM: OMAP: Mux updates for external DMA and GPIO
  ...

1 files changed, 11 insertions, 28 deletions

diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S
index 117a946c28c8..0c33a5ed5a61 100644
--- a/arch/arm/mm/proc-arm1020e.S
+++ b/arch/arm/mm/proc-arm1020e.S
@@ -421,11 +421,11 @@ __arm1020e_setup:
 #ifdef CONFIG_MMU
         mcr     p15, 0, r0, c8, c7              @ invalidate I,D TLBs on v4
 #endif
+        adr     r5, arm1020e_crval
+        ldmia   r5, {r5, r6}
         mrc     p15, 0, r0, c1, c0              @ get control register v4
-        ldr     r5, arm1020e_cr1_clear
         bic     r0, r0, r5
-        ldr     r5, arm1020e_cr1_set
-        orr     r0, r0, r5
+        orr     r0, r0, r6
 #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
         orr     r0, r0, #0x4000                 @ .R.. .... .... ....
 #endif
@@ -437,12 +437,9 @@ __arm1020e_setup:
          * .RVI ZFRS BLDP WCAM
          * .011 1001 ..11 0101
          */
-        .type   arm1020e_cr1_clear, #object
-        .type   arm1020e_cr1_set, #object
-arm1020e_cr1_clear:
-        .word   0x5f3f
-arm1020e_cr1_set:
-        .word   0x3935
+        .type   arm1020e_crval, #object
+arm1020e_crval:
+        crval   clear=0x00007f3f, mmuset=0x00003935, ucset=0x00001930
 
         __INITDATA
 
@@ -476,25 +473,7 @@ cpu_elf_name:
 
         .type   cpu_arm1020e_name, #object
 cpu_arm1020e_name:
-        .ascii  "ARM1020E"
-#ifndef CONFIG_CPU_ICACHE_DISABLE
-        .ascii  "i"
-#endif
-#ifndef CONFIG_CPU_DCACHE_DISABLE
-        .ascii  "d"
-#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
-        .ascii  "(wt)"
-#else
-        .ascii  "(wb)"
-#endif
-#endif
-#ifndef CONFIG_CPU_BPREDICT_DISABLE
-        .ascii  "B"
-#endif
-#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
-        .ascii  "RR"
-#endif
-        .ascii  "\0"
+        .asciz  "ARM1020E"
         .size   cpu_arm1020e_name, . - cpu_arm1020e_name
 
         .align
@@ -509,6 +488,10 @@ __arm1020e_proc_info:
                 PMD_BIT4 | \
                 PMD_SECT_AP_WRITE | \
                 PMD_SECT_AP_READ
+        .long   PMD_TYPE_SECT | \
+                PMD_BIT4 | \
+                PMD_SECT_AP_WRITE | \
+                PMD_SECT_AP_READ
         b       __arm1020e_setup
         .long   cpu_arch_name
         .long   cpu_elf_name