diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-07-26 07:22:12 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-07-27 05:48:42 -0400 |
commit | 9ca03a21e320a6bf44559323527aba704bcc8772 (patch) | |
tree | c3422c49decfdca220c0088938546c49ee71ba64 /arch/arm/mm/proc-arm1020e.S | |
parent | b8ab5397bcbd92e3fd4a9770e0bf59315fa38dab (diff) |
ARM: Factor out common code from cpu_proc_fin()
All implementations of cpu_proc_fin() start by disabling interrupts
and then flush caches. Rather than have every processors proc_fin()
implementation do this, move it out into generic code - and move the
cache flush past setup_mm_for_reboot() (so it can benefit from having
caches still enabled.)
This allows cpu_proc_fin() to become independent of the L1/L2 cache
types, and eventually move the L2 cache flushing into the L2 support
code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/proc-arm1020e.S')
-rw-r--r-- | arch/arm/mm/proc-arm1020e.S | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index d27829805609..1a511e765909 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S | |||
@@ -79,15 +79,11 @@ ENTRY(cpu_arm1020e_proc_init) | |||
79 | * cpu_arm1020e_proc_fin() | 79 | * cpu_arm1020e_proc_fin() |
80 | */ | 80 | */ |
81 | ENTRY(cpu_arm1020e_proc_fin) | 81 | ENTRY(cpu_arm1020e_proc_fin) |
82 | stmfd sp!, {lr} | ||
83 | mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE | ||
84 | msr cpsr_c, ip | ||
85 | bl arm1020e_flush_kern_cache_all | ||
86 | mrc p15, 0, r0, c1, c0, 0 @ ctrl register | 82 | mrc p15, 0, r0, c1, c0, 0 @ ctrl register |
87 | bic r0, r0, #0x1000 @ ...i............ | 83 | bic r0, r0, #0x1000 @ ...i............ |
88 | bic r0, r0, #0x000e @ ............wca. | 84 | bic r0, r0, #0x000e @ ............wca. |
89 | mcr p15, 0, r0, c1, c0, 0 @ disable caches | 85 | mcr p15, 0, r0, c1, c0, 0 @ disable caches |
90 | ldmfd sp!, {pc} | 86 | mov pc, lr |
91 | 87 | ||
92 | /* | 88 | /* |
93 | * cpu_arm1020e_reset(loc) | 89 | * cpu_arm1020e_reset(loc) |