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authorLinus Torvalds <torvalds@g5.osdl.org>2006-07-02 18:04:12 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-07-02 18:04:12 -0400
commita8c4c20dfa8b28a3c99e33c639d9c2ea5657741e (patch)
tree887b64d29b5a46d9ab2ca1267d8a2f05b5845561 /arch/arm/mm/proc-arm1020.S
parent168d04b3b4de7723eb73b3cffc9cb75224e0f393 (diff)
parent2dc7667b9d0674db6572723356fe3857031101a4 (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (44 commits) [ARM] 3541/2: workaround for PXA27x erratum E7 [ARM] nommu: provide a way for correct control register value selection [ARM] 3705/1: add supersection support to ioremap() [ARM] 3707/1: iwmmxt: use the generic thread notifier infrastructure [ARM] 3706/2: ep93xx: add cirrus logic edb9315a support [ARM] 3704/1: format IOP Kconfig with tabs, create more consistency [ARM] 3703/1: Add help description for ARCH_EP80219 [ARM] 3678/1: MMC: Make OMAP MMC work [ARM] 3677/1: OMAP: Update H2 defconfig [ARM] 3676/1: ARM: OMAP: Fix dmtimers and timer32k to compile on OMAP1 [ARM] Add section support to ioremap [ARM] Fix sa11x0 SDRAM selection [ARM] Set bit 4 on section mappings correctly depending on CPU [ARM] 3666/1: TRIZEPS4 [1/5] core ARM: OMAP: Multiplexing for 24xx GPMC wait pin monitoring ARM: OMAP: Fix SRAM to use MT_MEMORY instead of MT_DEVICE ARM: OMAP: Update dmtimers ARM: OMAP: Make clock variables static ARM: OMAP: Fix GPMC compilation when DEBUG is defined ARM: OMAP: Mux updates for external DMA and GPIO ...
Diffstat (limited to 'arch/arm/mm/proc-arm1020.S')
-rw-r--r--arch/arm/mm/proc-arm1020.S19
1 files changed, 10 insertions, 9 deletions
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S
index cc609666df05..700297ae4a55 100644
--- a/arch/arm/mm/proc-arm1020.S
+++ b/arch/arm/mm/proc-arm1020.S
@@ -439,11 +439,12 @@ __arm1020_setup:
439#ifdef CONFIG_MMU 439#ifdef CONFIG_MMU
440 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 440 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4
441#endif 441#endif
442
443 adr r5, arm1020_crval
444 ldmia r5, {r5, r6}
442 mrc p15, 0, r0, c1, c0 @ get control register v4 445 mrc p15, 0, r0, c1, c0 @ get control register v4
443 ldr r5, arm1020_cr1_clear
444 bic r0, r0, r5 446 bic r0, r0, r5
445 ldr r5, arm1020_cr1_set 447 orr r0, r0, r6
446 orr r0, r0, r5
447#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN 448#ifdef CONFIG_CPU_CACHE_ROUND_ROBIN
448 orr r0, r0, #0x4000 @ .R.. .... .... .... 449 orr r0, r0, #0x4000 @ .R.. .... .... ....
449#endif 450#endif
@@ -455,12 +456,9 @@ __arm1020_setup:
455 * .RVI ZFRS BLDP WCAM 456 * .RVI ZFRS BLDP WCAM
456 * .011 1001 ..11 0101 457 * .011 1001 ..11 0101
457 */ 458 */
458 .type arm1020_cr1_clear, #object 459 .type arm1020_crval, #object
459 .type arm1020_cr1_set, #object 460arm1020_crval:
460arm1020_cr1_clear: 461 crval clear=0x0000593f, mmuset=0x00003935, ucset=0x00001930
461 .word 0x593f
462arm1020_cr1_set:
463 .word 0x3935
464 462
465 __INITDATA 463 __INITDATA
466 464
@@ -526,6 +524,9 @@ __arm1020_proc_info:
526 .long PMD_TYPE_SECT | \ 524 .long PMD_TYPE_SECT | \
527 PMD_SECT_AP_WRITE | \ 525 PMD_SECT_AP_WRITE | \
528 PMD_SECT_AP_READ 526 PMD_SECT_AP_READ
527 .long PMD_TYPE_SECT | \
528 PMD_SECT_AP_WRITE | \
529 PMD_SECT_AP_READ
529 b __arm1020_setup 530 b __arm1020_setup
530 .long cpu_arch_name 531 .long cpu_arch_name
531 .long cpu_elf_name 532 .long cpu_elf_name