aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mm/mmu.c
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2009-06-22 17:56:13 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-06-22 17:56:13 -0400
commit9e268beb92ee3a853b3946e84b10358207e2085f (patch)
treedec36344c8b16d53e56763aa174dd7ea806b653f /arch/arm/mm/mmu.c
parent2e8b5a09ebf1f98f02c1988a48415e89d4c25168 (diff)
parent9ccdac3662dbf3c75e8f8851a214bdf7d365a4bd (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (49 commits) [ARM] idle: clean up pm_idle calling, obey hlt_counter [ARM] S3C: Fix gpio-config off-by-one bug [ARM] S3C64XX: add to_irq() support for EINT() GPIO [ARM] S3C64XX: clock.c: fix typo in usb-host clock ctrlbit [ARM] S3C64XX: fix HCLK gate defines [ARM] Update mach-types [ARM] wire up rt_tgsigqueueinfo and perf_counter_open OMAP2 clock/powerdomain: off by 1 error in loop timeout comparisons OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLL OMAP3: Add support for DPLL3 divisor values higher than 2 OMAP3 SRAM: convert SRAM code to use macros rather than magic numbers OMAP3 SRAM: add more comments on the SRAM code OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock change OMAP3 clock: add a short delay when lowering CORE clk rate OMAP3 clock: initialize SDRC timings at kernel start OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize [ARM] Add old Feroceon support to compressed/head.S [ARM] 5559/1: Limit the stack unwinding caused by a kthread exit [ARM] 5558/1: Add extra checks to ARM unwinder to avoid tracing corrupt stacks [ARM] 5557/1: Discard some ARM.ex*.*exit.text sections when !HOTPLUG or !HOTPLUG_CPU ...
Diffstat (limited to 'arch/arm/mm/mmu.c')
-rw-r--r--arch/arm/mm/mmu.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index fdaa9bb87c16..4722582b17b8 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -836,6 +836,13 @@ void __init reserve_node_zero(pg_data_t *pgdat)
836 BOOTMEM_EXCLUSIVE); 836 BOOTMEM_EXCLUSIVE);
837 } 837 }
838 838
839 if (machine_is_treo680()) {
840 reserve_bootmem_node(pgdat, 0xa0000000, 0x1000,
841 BOOTMEM_EXCLUSIVE);
842 reserve_bootmem_node(pgdat, 0xa2000000, 0x1000,
843 BOOTMEM_EXCLUSIVE);
844 }
845
839 if (machine_is_palmt5()) 846 if (machine_is_palmt5())
840 reserve_bootmem_node(pgdat, 0xa0200000, 0x1000, 847 reserve_bootmem_node(pgdat, 0xa0200000, 0x1000,
841 BOOTMEM_EXCLUSIVE); 848 BOOTMEM_EXCLUSIVE);