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authorHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2009-12-14 13:23:03 -0500
committerHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2009-12-14 13:23:03 -0500
commit559300bc0ef7ccd541656f1189d38e7088389559 (patch)
treecd1682881ca4246e9c5a1e8632be4bdd9d9706c6 /arch/arm/mm/mmu.c
parent5416bf33f92a4104dbcd6062bf377c8421ca3cfd (diff)
parent22763c5cf3690a681551162c15d34d935308c8d7 (diff)
Merge commit 'v2.6.32'
Conflicts: arch/avr32/mach-at32ap/include/mach/cpu.h
Diffstat (limited to 'arch/arm/mm/mmu.c')
-rw-r--r--arch/arm/mm/mmu.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 02243eeccf50..ea67be0223ac 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -117,6 +117,13 @@ static void __init early_cachepolicy(char **p)
117 } 117 }
118 if (i == ARRAY_SIZE(cache_policies)) 118 if (i == ARRAY_SIZE(cache_policies))
119 printk(KERN_ERR "ERROR: unknown or unsupported cache policy\n"); 119 printk(KERN_ERR "ERROR: unknown or unsupported cache policy\n");
120 /*
121 * This restriction is partly to do with the way we boot; it is
122 * unpredictable to have memory mapped using two different sets of
123 * memory attributes (shared, type, and cache attribs). We can not
124 * change these attributes once the initial assembly has setup the
125 * page tables.
126 */
120 if (cpu_architecture() >= CPU_ARCH_ARMv6) { 127 if (cpu_architecture() >= CPU_ARCH_ARMv6) {
121 printk(KERN_WARNING "Only cachepolicy=writeback supported on ARMv6 and later\n"); 128 printk(KERN_WARNING "Only cachepolicy=writeback supported on ARMv6 and later\n");
122 cachepolicy = CPOLICY_WRITEBACK; 129 cachepolicy = CPOLICY_WRITEBACK;