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authorIngo Molnar <mingo@elte.hu>2009-11-17 04:16:43 -0500
committerIngo Molnar <mingo@elte.hu>2009-11-17 04:17:47 -0500
commita7b63425a41cd6a8d50f76fef0660c5110f97e91 (patch)
treebe17ee121f1c8814d8d39c9f3e0205d9397fab54 /arch/arm/mm/mmu.c
parent35039eb6b199749943547c8572be6604edf00229 (diff)
parent3726cc75e581c157202da93bb2333cce25c15c98 (diff)
Merge branch 'perf/core' into perf/probes
Resolved merge conflict in tools/perf/Makefile Merge reason: we want to queue up a dependent patch. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mm/mmu.c')
-rw-r--r--arch/arm/mm/mmu.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 02243eeccf50..ea67be0223ac 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -117,6 +117,13 @@ static void __init early_cachepolicy(char **p)
117 } 117 }
118 if (i == ARRAY_SIZE(cache_policies)) 118 if (i == ARRAY_SIZE(cache_policies))
119 printk(KERN_ERR "ERROR: unknown or unsupported cache policy\n"); 119 printk(KERN_ERR "ERROR: unknown or unsupported cache policy\n");
120 /*
121 * This restriction is partly to do with the way we boot; it is
122 * unpredictable to have memory mapped using two different sets of
123 * memory attributes (shared, type, and cache attribs). We can not
124 * change these attributes once the initial assembly has setup the
125 * page tables.
126 */
120 if (cpu_architecture() >= CPU_ARCH_ARMv6) { 127 if (cpu_architecture() >= CPU_ARCH_ARMv6) {
121 printk(KERN_WARNING "Only cachepolicy=writeback supported on ARMv6 and later\n"); 128 printk(KERN_WARNING "Only cachepolicy=writeback supported on ARMv6 and later\n");
122 cachepolicy = CPOLICY_WRITEBACK; 129 cachepolicy = CPOLICY_WRITEBACK;