ARM: integrate CMA with DMA-mapping subsystem

This patch adds support for CMA to dma-mapping subsystem for ARM
architecture. By default a global CMA area is used, but specific devices
are allowed to have their private memory areas if required (they can be
created with dma_declare_contiguous() function during board
initialisation).

Contiguous memory areas reserved for DMA are remapped with 2-level page
tables on boot. Once a buffer is requested, a low memory kernel mapping
is updated to to match requested memory access type.

GFP_ATOMIC allocations are performed from special pool which is created
early during boot. This way remapping page attributes is not needed on
allocation time.

CMA has been enabled unconditionally for ARMv6+ systems.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Michal Nazarewicz <mina86@mina86.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Rob Clark <rob.clark@linaro.org>
Tested-by: Ohad Ben-Cohen <ohad@wizery.com>
Tested-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Tested-by: Barry Song <Baohua.Song@csr.com>

1 files changed, 20 insertions, 11 deletions

diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index aa78de8bfdd3..e5dad60b558b 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -288,6 +288,11 @@ static struct mem_type mem_types[] = {
                                 PMD_SECT_UNCACHED | PMD_SECT_XN,
                 .domain    = DOMAIN_KERNEL,
         },
+        [MT_MEMORY_DMA_READY] = {
+                .prot_pte  = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY,
+                .prot_l1   = PMD_TYPE_TABLE,
+                .domain    = DOMAIN_KERNEL,
+        },
 };
 
 const struct mem_type *get_mem_type(unsigned int type)
@@ -429,6 +434,7 @@ static void __init build_mem_type_table(void)
         if (arch_is_coherent() && cpu_is_xsc3()) {
                 mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
                 mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
+                mem_types[MT_MEMORY_DMA_READY].prot_pte |= L_PTE_SHARED;
                 mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
                 mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
         }
@@ -460,6 +466,7 @@ static void __init build_mem_type_table(void)
                         mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
                         mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
                         mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED;
+                        mem_types[MT_MEMORY_DMA_READY].prot_pte |= L_PTE_SHARED;
                         mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
                         mem_types[MT_MEMORY_NONCACHED].prot_pte |= L_PTE_SHARED;
                 }
@@ -512,6 +519,7 @@ static void __init build_mem_type_table(void)
         mem_types[MT_HIGH_VECTORS].prot_l1 |= ecc_mask;
         mem_types[MT_MEMORY].prot_sect |= ecc_mask | cp->pmd;
         mem_types[MT_MEMORY].prot_pte |= kern_pgprot;
+        mem_types[MT_MEMORY_DMA_READY].prot_pte |= kern_pgprot;
         mem_types[MT_MEMORY_NONCACHED].prot_sect |= ecc_mask;
         mem_types[MT_ROM].prot_sect |= cp->pmd;
 
@@ -596,7 +604,7 @@ static void __init alloc_init_section(pud_t *pud, unsigned long addr,
          * L1 entries, whereas PGDs refer to a group of L1 entries making
          * up one logical pointer to an L2 table.
          */
-        if (((addr | end | phys) & ~SECTION_MASK) == 0) {
+        if (type->prot_sect && ((addr | end | phys) & ~SECTION_MASK) == 0) {
                 pmd_t *p = pmd;
 
 #ifndef CONFIG_ARM_LPAE
@@ -814,7 +822,7 @@ static int __init early_vmalloc(char *arg)
 }
 early_param("vmalloc", early_vmalloc);
 
-static phys_addr_t lowmem_limit __initdata = 0;
+phys_addr_t arm_lowmem_limit __initdata = 0;
 
 void __init sanity_check_meminfo(void)
 {
@@ -897,8 +905,8 @@ void __init sanity_check_meminfo(void)
                         bank->size = newsize;
                 }
 #endif
-                if (!bank->highmem && bank->start + bank->size > lowmem_limit)
-                        lowmem_limit = bank->start + bank->size;
+                if (!bank->highmem && bank->start + bank->size > arm_lowmem_limit)
+                        arm_lowmem_limit = bank->start + bank->size;
 
                 j++;
         }
@@ -923,8 +931,8 @@ void __init sanity_check_meminfo(void)
         }
 #endif
         meminfo.nr_banks = j;
-        high_memory = __va(lowmem_limit - 1) + 1;
-        memblock_set_current_limit(lowmem_limit);
+        high_memory = __va(arm_lowmem_limit - 1) + 1;
+        memblock_set_current_limit(arm_lowmem_limit);
 }
 
 static inline void prepare_page_table(void)
@@ -949,8 +957,8 @@ static inline void prepare_page_table(void)
          * Find the end of the first block of lowmem.
          */
         end = memblock.memory.regions[0].base + memblock.memory.regions[0].size;
-        if (end >= lowmem_limit)
-                end = lowmem_limit;
+        if (end >= arm_lowmem_limit)
+                end = arm_lowmem_limit;
 
         /*
          * Clear out all the kernel space mappings, except for the first
@@ -1093,8 +1101,8 @@ static void __init map_lowmem(void)
                 phys_addr_t end = start + reg->size;
                 struct map_desc map;
 
-                if (end > lowmem_limit)
-                        end = lowmem_limit;
+                if (end > arm_lowmem_limit)
+                        end = arm_lowmem_limit;
                 if (start >= end)
                         break;
 
@@ -1115,11 +1123,12 @@ void __init paging_init(struct machine_desc *mdesc)
 {
         void *zero_page;
 
-        memblock_set_current_limit(lowmem_limit);
+        memblock_set_current_limit(arm_lowmem_limit);
 
         build_mem_type_table();
         prepare_page_table();
         map_lowmem();
+        dma_contiguous_remap();
         devicemaps_init(mdesc);
         kmap_init();