diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-04-09 10:00:11 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-04-09 10:00:11 -0400 |
commit | 85b3cce880a19e78286570d5fd004cc3cac06f57 (patch) | |
tree | bf251707e89682972089dfec185ca5625db88e34 /arch/arm/mm/mmu.c | |
parent | 9823f1a8463fb631fe965110fe19adeb3df239c4 (diff) |
ARM: Fix ioremap_cached()/ioremap_wc() for SMP platforms
Write combining/cached device mappings are not setting the shared bit,
which could potentially cause problems on SMP systems since the cache
lines won't participate in the cache coherency protocol.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mm/mmu.c')
-rw-r--r-- | arch/arm/mm/mmu.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 9d4da6ac28eb..4223d086aa17 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c | |||
@@ -420,6 +420,10 @@ static void __init build_mem_type_table(void) | |||
420 | user_pgprot |= L_PTE_SHARED; | 420 | user_pgprot |= L_PTE_SHARED; |
421 | kern_pgprot |= L_PTE_SHARED; | 421 | kern_pgprot |= L_PTE_SHARED; |
422 | vecs_pgprot |= L_PTE_SHARED; | 422 | vecs_pgprot |= L_PTE_SHARED; |
423 | mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_S; | ||
424 | mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED; | ||
425 | mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S; | ||
426 | mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED; | ||
423 | mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; | 427 | mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; |
424 | mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S; | 428 | mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S; |
425 | #endif | 429 | #endif |