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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-07-02 09:46:27 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-01-26 15:06:14 -0500
commitde27c308223dc9bd48de9742c7c2b53a15c1b012 (patch)
treed32acbc71110b1e727abd80620f95f14565b6031 /arch/arm/mm/flush.c
parentdcd6c92267155e70a94b3927bce681ce74b80d1f (diff)
ARM: pgtable: move TOP_PTE address definitions to arch/arm/mm/mm.h
Move the TOP_PTE address definitions to one central place so that it's easy to discover what they're being used for. This helps to ensure that there are no overlaps. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/flush.c')
-rw-r--r--arch/arm/mm/flush.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 1a8d4aa821be..f4d407af4690 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -23,11 +23,9 @@
23 23
24#ifdef CONFIG_CPU_CACHE_VIPT 24#ifdef CONFIG_CPU_CACHE_VIPT
25 25
26#define ALIAS_FLUSH_START 0xffff4000
27
28static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr) 26static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
29{ 27{
30 unsigned long to = ALIAS_FLUSH_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT); 28 unsigned long to = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
31 const int zero = 0; 29 const int zero = 0;
32 30
33 set_pte_ext(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL), 0); 31 set_pte_ext(TOP_PTE(to), pfn_pte(pfn, PAGE_KERNEL), 0);
@@ -46,8 +44,8 @@ static void flush_icache_alias(unsigned long pfn, unsigned long vaddr, unsigned
46 unsigned long offset = vaddr & (PAGE_SIZE - 1); 44 unsigned long offset = vaddr & (PAGE_SIZE - 1);
47 unsigned long to; 45 unsigned long to;
48 46
49 set_pte_ext(TOP_PTE(ALIAS_FLUSH_START) + colour, pfn_pte(pfn, PAGE_KERNEL), 0); 47 set_pte_ext(TOP_PTE(FLUSH_ALIAS_START) + colour, pfn_pte(pfn, PAGE_KERNEL), 0);
50 to = ALIAS_FLUSH_START + (colour << PAGE_SHIFT) + offset; 48 to = FLUSH_ALIAS_START + (colour << PAGE_SHIFT) + offset;
51 flush_tlb_kernel_page(to); 49 flush_tlb_kernel_page(to);
52 flush_icache_range(to, to + len); 50 flush_icache_range(to, to + len);
53} 51}