[ARM] 4078/1: Fix ARM copypage cache coherency problems

If PG_dcache_dirty is set for a page, we need to flush the source page
before performing any copypage operation using a different virtual address.

This fixes the copypage implementations for XScale, StrongARM and ARMv6.

This patch fixes segmentation faults seen in the dynamic linker under
the usage patterns in glibc 2.4/2.5.

Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 4 insertions, 0 deletions

diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index 865777dec161..3adb79257f43 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -53,6 +53,10 @@ static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned lo
 {
         unsigned int offset = CACHE_COLOUR(vaddr);
         unsigned long from, to;
+        struct page *page = virt_to_page(kfrom);
+
+        if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
+                __flush_dcache_page(page_mapping(page), page);
 
         /*
          * Discard data in the kernel mapping for the new page.