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authorCatalin Marinas <catalin.marinas@arm.com>2007-02-05 08:48:08 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-08 09:49:40 -0500
commit953233dc9958ba2b29753d0f24e37a33a076a5f6 (patch)
treeb9cc9ddc82722dc79a72a8c6f4977566ec2e0384 /arch/arm/mm/consistent.c
parent7f8e33546d17c7d8849be3a6623c3b6b3c9b588b (diff)
[ARM] 4134/1: Add generic support for outer caches
The outer cache can be L2 as on RealView/EB MPCore platform or even L3 or further on ARMv7 cores. This patch adds the generic support for flushing the outer cache in the DMA operations. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/consistent.c')
-rw-r--r--arch/arm/mm/consistent.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mm/consistent.c b/arch/arm/mm/consistent.c
index 6a9c362fef5e..83bd035c7d5e 100644
--- a/arch/arm/mm/consistent.c
+++ b/arch/arm/mm/consistent.c
@@ -208,6 +208,7 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
208 unsigned long kaddr = (unsigned long)page_address(page); 208 unsigned long kaddr = (unsigned long)page_address(page);
209 memset(page_address(page), 0, size); 209 memset(page_address(page), 0, size);
210 dmac_flush_range(kaddr, kaddr + size); 210 dmac_flush_range(kaddr, kaddr + size);
211 outer_flush_range(__pa(kaddr), __pa(kaddr) + size);
211 } 212 }
212 213
213 /* 214 /*
@@ -485,15 +486,20 @@ void consistent_sync(void *vaddr, size_t size, int direction)
485 unsigned long start = (unsigned long)vaddr; 486 unsigned long start = (unsigned long)vaddr;
486 unsigned long end = start + size; 487 unsigned long end = start + size;
487 488
489 BUG_ON(!virt_addr_valid(start) || !virt_addr_valid(end));
490
488 switch (direction) { 491 switch (direction) {
489 case DMA_FROM_DEVICE: /* invalidate only */ 492 case DMA_FROM_DEVICE: /* invalidate only */
490 dmac_inv_range(start, end); 493 dmac_inv_range(start, end);
494 outer_inv_range(__pa(start), __pa(end));
491 break; 495 break;
492 case DMA_TO_DEVICE: /* writeback only */ 496 case DMA_TO_DEVICE: /* writeback only */
493 dmac_clean_range(start, end); 497 dmac_clean_range(start, end);
498 outer_clean_range(__pa(start), __pa(end));
494 break; 499 break;
495 case DMA_BIDIRECTIONAL: /* writeback and invalidate */ 500 case DMA_BIDIRECTIONAL: /* writeback and invalidate */
496 dmac_flush_range(start, end); 501 dmac_flush_range(start, end);
502 outer_flush_range(__pa(start), __pa(end));
497 break; 503 break;
498 default: 504 default:
499 BUG(); 505 BUG();