aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mm/cache-v7.S
diff options
context:
space:
mode:
authorRussell King <rmk+kernel@arm.linux.org.uk>2009-11-26 07:56:21 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-12-14 09:53:22 -0500
commit2c9b9c8490b60428fa2d1c64042f7c7caed93940 (patch)
treec8af289af8c801193eea924db0cd81f09068ddb9 /arch/arm/mm/cache-v7.S
parentccaf5f05b218e5eb41e2f5cdfd26b18dce4a0218 (diff)
ARM: add size argument to __cpuc_flush_dcache_page
... and rename the function since it no longer operates on just pages. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/cache-v7.S')
-rw-r--r--arch/arm/mm/cache-v7.S13
1 files changed, 7 insertions, 6 deletions
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S
index e1bd9759617f..9073db849fb4 100644
--- a/arch/arm/mm/cache-v7.S
+++ b/arch/arm/mm/cache-v7.S
@@ -186,16 +186,17 @@ ENDPROC(v7_coherent_kern_range)
186ENDPROC(v7_coherent_user_range) 186ENDPROC(v7_coherent_user_range)
187 187
188/* 188/*
189 * v7_flush_kern_dcache_page(kaddr) 189 * v7_flush_kern_dcache_area(void *addr, size_t size)
190 * 190 *
191 * Ensure that the data held in the page kaddr is written back 191 * Ensure that the data held in the page kaddr is written back
192 * to the page in question. 192 * to the page in question.
193 * 193 *
194 * - kaddr - kernel address (guaranteed to be page aligned) 194 * - addr - kernel address
195 * - size - region size
195 */ 196 */
196ENTRY(v7_flush_kern_dcache_page) 197ENTRY(v7_flush_kern_dcache_area)
197 dcache_line_size r2, r3 198 dcache_line_size r2, r3
198 add r1, r0, #PAGE_SZ 199 add r1, r0, r1
1991: 2001:
200 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line / unified line 201 mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line / unified line
201 add r0, r0, r2 202 add r0, r0, r2
@@ -203,7 +204,7 @@ ENTRY(v7_flush_kern_dcache_page)
203 blo 1b 204 blo 1b
204 dsb 205 dsb
205 mov pc, lr 206 mov pc, lr
206ENDPROC(v7_flush_kern_dcache_page) 207ENDPROC(v7_flush_kern_dcache_area)
207 208
208/* 209/*
209 * v7_dma_inv_range(start,end) 210 * v7_dma_inv_range(start,end)
@@ -279,7 +280,7 @@ ENTRY(v7_cache_fns)
279 .long v7_flush_user_cache_range 280 .long v7_flush_user_cache_range
280 .long v7_coherent_kern_range 281 .long v7_coherent_kern_range
281 .long v7_coherent_user_range 282 .long v7_coherent_user_range
282 .long v7_flush_kern_dcache_page 283 .long v7_flush_kern_dcache_area
283 .long v7_dma_inv_range 284 .long v7_dma_inv_range
284 .long v7_dma_clean_range 285 .long v7_dma_clean_range
285 .long v7_dma_flush_range 286 .long v7_dma_flush_range