diff options
author | Paul Mackerras <paulus@samba.org> | 2006-02-07 17:43:08 -0500 |
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committer | Paul Mackerras <paulus@samba.org> | 2006-02-07 17:43:08 -0500 |
commit | 8f75015f33c3005e0bbf83ffc0d5e0b4262cc03d (patch) | |
tree | a3c34ad86ccdc904bb43af6cd1cb163231c29276 /arch/arm/mm/cache-v6.S | |
parent | 076d022c566fddde41fd4a858dd24bacad8304d7 (diff) | |
parent | e060e084e7d9e1c62d02cb6b8d3fe07db5317eaa (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
Diffstat (limited to 'arch/arm/mm/cache-v6.S')
-rw-r--r-- | arch/arm/mm/cache-v6.S | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S index 72966d90e956..d921c1024ae0 100644 --- a/arch/arm/mm/cache-v6.S +++ b/arch/arm/mm/cache-v6.S | |||
@@ -92,22 +92,16 @@ ENTRY(v6_coherent_kern_range) | |||
92 | * - the Icache does not read data from the write buffer | 92 | * - the Icache does not read data from the write buffer |
93 | */ | 93 | */ |
94 | ENTRY(v6_coherent_user_range) | 94 | ENTRY(v6_coherent_user_range) |
95 | bic r0, r0, #CACHE_LINE_SIZE - 1 | 95 | |
96 | 1: | ||
97 | #ifdef HARVARD_CACHE | 96 | #ifdef HARVARD_CACHE |
98 | mcr p15, 0, r0, c7, c10, 1 @ clean D line | 97 | bic r0, r0, #CACHE_LINE_SIZE - 1 |
98 | 1: mcr p15, 0, r0, c7, c10, 1 @ clean D line | ||
99 | mcr p15, 0, r0, c7, c5, 1 @ invalidate I line | 99 | mcr p15, 0, r0, c7, c5, 1 @ invalidate I line |
100 | #endif | 100 | add r0, r0, #CACHE_LINE_SIZE |
101 | mcr p15, 0, r0, c7, c5, 7 @ invalidate BTB entry | ||
102 | add r0, r0, #BTB_FLUSH_SIZE | ||
103 | mcr p15, 0, r0, c7, c5, 7 @ invalidate BTB entry | ||
104 | add r0, r0, #BTB_FLUSH_SIZE | ||
105 | mcr p15, 0, r0, c7, c5, 7 @ invalidate BTB entry | ||
106 | add r0, r0, #BTB_FLUSH_SIZE | ||
107 | mcr p15, 0, r0, c7, c5, 7 @ invalidate BTB entry | ||
108 | add r0, r0, #BTB_FLUSH_SIZE | ||
109 | cmp r0, r1 | 101 | cmp r0, r1 |
110 | blo 1b | 102 | blo 1b |
103 | #endif | ||
104 | mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB | ||
111 | #ifdef HARVARD_CACHE | 105 | #ifdef HARVARD_CACHE |
112 | mov r0, #0 | 106 | mov r0, #0 |
113 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer | 107 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer |