diff options
author | David S. Miller <davem@davemloft.net> | 2009-11-19 01:19:03 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-11-19 01:19:03 -0500 |
commit | 3505d1a9fd65e2d3e00827857b6795d9d8983658 (patch) | |
tree | 941cfafdb57c427bb6b7ebf6354ee93b2a3693b5 /arch/arm/mm/cache-v6.S | |
parent | dfef948ed2ba69cf041840b5e860d6b4e16fa0b1 (diff) | |
parent | 66b00a7c93ec782d118d2c03bd599cfd041e80a1 (diff) |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
drivers/net/sfc/sfe4001.c
drivers/net/wireless/libertas/cmd.c
drivers/staging/Kconfig
drivers/staging/Makefile
drivers/staging/rtl8187se/Kconfig
drivers/staging/rtl8192e/Kconfig
Diffstat (limited to 'arch/arm/mm/cache-v6.S')
-rw-r--r-- | arch/arm/mm/cache-v6.S | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S index 8f5c13f4c936..295e25dd6381 100644 --- a/arch/arm/mm/cache-v6.S +++ b/arch/arm/mm/cache-v6.S | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/linkage.h> | 12 | #include <linux/linkage.h> |
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <asm/assembler.h> | 14 | #include <asm/assembler.h> |
15 | #include <asm/unwind.h> | ||
15 | 16 | ||
16 | #include "proc-macros.S" | 17 | #include "proc-macros.S" |
17 | 18 | ||
@@ -121,11 +122,13 @@ ENTRY(v6_coherent_kern_range) | |||
121 | * - the Icache does not read data from the write buffer | 122 | * - the Icache does not read data from the write buffer |
122 | */ | 123 | */ |
123 | ENTRY(v6_coherent_user_range) | 124 | ENTRY(v6_coherent_user_range) |
124 | 125 | UNWIND(.fnstart ) | |
125 | #ifdef HARVARD_CACHE | 126 | #ifdef HARVARD_CACHE |
126 | bic r0, r0, #CACHE_LINE_SIZE - 1 | 127 | bic r0, r0, #CACHE_LINE_SIZE - 1 |
127 | 1: mcr p15, 0, r0, c7, c10, 1 @ clean D line | 128 | 1: |
129 | USER( mcr p15, 0, r0, c7, c10, 1 ) @ clean D line | ||
128 | add r0, r0, #CACHE_LINE_SIZE | 130 | add r0, r0, #CACHE_LINE_SIZE |
131 | 2: | ||
129 | cmp r0, r1 | 132 | cmp r0, r1 |
130 | blo 1b | 133 | blo 1b |
131 | #endif | 134 | #endif |
@@ -143,6 +146,19 @@ ENTRY(v6_coherent_user_range) | |||
143 | mov pc, lr | 146 | mov pc, lr |
144 | 147 | ||
145 | /* | 148 | /* |
149 | * Fault handling for the cache operation above. If the virtual address in r0 | ||
150 | * isn't mapped, just try the next page. | ||
151 | */ | ||
152 | 9001: | ||
153 | mov r0, r0, lsr #12 | ||
154 | mov r0, r0, lsl #12 | ||
155 | add r0, r0, #4096 | ||
156 | b 2b | ||
157 | UNWIND(.fnend ) | ||
158 | ENDPROC(v6_coherent_user_range) | ||
159 | ENDPROC(v6_coherent_kern_range) | ||
160 | |||
161 | /* | ||
146 | * v6_flush_kern_dcache_page(kaddr) | 162 | * v6_flush_kern_dcache_page(kaddr) |
147 | * | 163 | * |
148 | * Ensure that the data held in the page kaddr is written back | 164 | * Ensure that the data held in the page kaddr is written back |