diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-11-26 11:19:58 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-02-15 10:22:20 -0500 |
commit | a9c9147eb9b1dba0ce567a41897c7773b4d1b0bc (patch) | |
tree | 178938c909f4717c2e599d6f3de954d7ee8a7f21 /arch/arm/mm/cache-v4wb.S | |
parent | 93f1d629e22b08642eb713ad96ac2cb9ade0641c (diff) |
ARM: dma-mapping: provide per-cpu type map/unmap functions
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-By: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mm/cache-v4wb.S')
-rw-r--r-- | arch/arm/mm/cache-v4wb.S | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-v4wb.S b/arch/arm/mm/cache-v4wb.S index 3dbedf1ec0e7..32e7a7448496 100644 --- a/arch/arm/mm/cache-v4wb.S +++ b/arch/arm/mm/cache-v4wb.S | |||
@@ -216,6 +216,30 @@ ENTRY(v4wb_dma_clean_range) | |||
216 | .globl v4wb_dma_flush_range | 216 | .globl v4wb_dma_flush_range |
217 | .set v4wb_dma_flush_range, v4wb_coherent_kern_range | 217 | .set v4wb_dma_flush_range, v4wb_coherent_kern_range |
218 | 218 | ||
219 | /* | ||
220 | * dma_map_area(start, size, dir) | ||
221 | * - start - kernel virtual start address | ||
222 | * - size - size of region | ||
223 | * - dir - DMA direction | ||
224 | */ | ||
225 | ENTRY(v4wb_dma_map_area) | ||
226 | add r1, r1, r0 | ||
227 | cmp r2, #DMA_TO_DEVICE | ||
228 | beq v4wb_dma_clean_range | ||
229 | bcs v4wb_dma_inv_range | ||
230 | b v4wb_dma_flush_range | ||
231 | ENDPROC(v4wb_dma_map_area) | ||
232 | |||
233 | /* | ||
234 | * dma_unmap_area(start, size, dir) | ||
235 | * - start - kernel virtual start address | ||
236 | * - size - size of region | ||
237 | * - dir - DMA direction | ||
238 | */ | ||
239 | ENTRY(v4wb_dma_unmap_area) | ||
240 | mov pc, lr | ||
241 | ENDPROC(v4wb_dma_unmap_area) | ||
242 | |||
219 | __INITDATA | 243 | __INITDATA |
220 | 244 | ||
221 | .type v4wb_cache_fns, #object | 245 | .type v4wb_cache_fns, #object |
@@ -226,6 +250,8 @@ ENTRY(v4wb_cache_fns) | |||
226 | .long v4wb_coherent_kern_range | 250 | .long v4wb_coherent_kern_range |
227 | .long v4wb_coherent_user_range | 251 | .long v4wb_coherent_user_range |
228 | .long v4wb_flush_kern_dcache_area | 252 | .long v4wb_flush_kern_dcache_area |
253 | .long v4wb_dma_map_area | ||
254 | .long v4wb_dma_unmap_area | ||
229 | .long v4wb_dma_inv_range | 255 | .long v4wb_dma_inv_range |
230 | .long v4wb_dma_clean_range | 256 | .long v4wb_dma_clean_range |
231 | .long v4wb_dma_flush_range | 257 | .long v4wb_dma_flush_range |