diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-11-26 11:24:19 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-02-15 10:22:23 -0500 |
commit | 702b94bff3c50542a6e4ab9a4f4cef093262fe65 (patch) | |
tree | 2ae468b08de2aeb0e65ab3830c40c7a84dbbdb5e /arch/arm/mm/cache-v4wb.S | |
parent | a9c9147eb9b1dba0ce567a41897c7773b4d1b0bc (diff) |
ARM: dma-mapping: remove dmac_clean_range and dmac_inv_range
These are now unused, and so can be removed.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-By: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mm/cache-v4wb.S')
-rw-r--r-- | arch/arm/mm/cache-v4wb.S | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/mm/cache-v4wb.S b/arch/arm/mm/cache-v4wb.S index 32e7a7448496..df8368afa102 100644 --- a/arch/arm/mm/cache-v4wb.S +++ b/arch/arm/mm/cache-v4wb.S | |||
@@ -173,7 +173,7 @@ ENTRY(v4wb_coherent_user_range) | |||
173 | * - start - virtual start address | 173 | * - start - virtual start address |
174 | * - end - virtual end address | 174 | * - end - virtual end address |
175 | */ | 175 | */ |
176 | ENTRY(v4wb_dma_inv_range) | 176 | v4wb_dma_inv_range: |
177 | tst r0, #CACHE_DLINESIZE - 1 | 177 | tst r0, #CACHE_DLINESIZE - 1 |
178 | bic r0, r0, #CACHE_DLINESIZE - 1 | 178 | bic r0, r0, #CACHE_DLINESIZE - 1 |
179 | mcrne p15, 0, r0, c7, c10, 1 @ clean D entry | 179 | mcrne p15, 0, r0, c7, c10, 1 @ clean D entry |
@@ -194,7 +194,7 @@ ENTRY(v4wb_dma_inv_range) | |||
194 | * - start - virtual start address | 194 | * - start - virtual start address |
195 | * - end - virtual end address | 195 | * - end - virtual end address |
196 | */ | 196 | */ |
197 | ENTRY(v4wb_dma_clean_range) | 197 | v4wb_dma_clean_range: |
198 | bic r0, r0, #CACHE_DLINESIZE - 1 | 198 | bic r0, r0, #CACHE_DLINESIZE - 1 |
199 | 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 199 | 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
200 | add r0, r0, #CACHE_DLINESIZE | 200 | add r0, r0, #CACHE_DLINESIZE |
@@ -252,7 +252,5 @@ ENTRY(v4wb_cache_fns) | |||
252 | .long v4wb_flush_kern_dcache_area | 252 | .long v4wb_flush_kern_dcache_area |
253 | .long v4wb_dma_map_area | 253 | .long v4wb_dma_map_area |
254 | .long v4wb_dma_unmap_area | 254 | .long v4wb_dma_unmap_area |
255 | .long v4wb_dma_inv_range | ||
256 | .long v4wb_dma_clean_range | ||
257 | .long v4wb_dma_flush_range | 255 | .long v4wb_dma_flush_range |
258 | .size v4wb_cache_fns, . - v4wb_cache_fns | 256 | .size v4wb_cache_fns, . - v4wb_cache_fns |