diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-17 18:53:41 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-17 18:53:41 -0500 |
commit | a695bc683609a2b815915e4cfcd93e4ccc0e2cae (patch) | |
tree | 824d6b35783317f929fe13a9efcc8a35d5e00311 /arch/arm/mm/cache-v4.S | |
parent | 6485536bcf499839a54dcda8a8d47ea0bd29b375 (diff) | |
parent | 6665398afafcb1c75d933c1452a9010644aba3e6 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
PCMCIA: fix pxa2xx_lubbock modular build error
[ARM] Update mach-types
[ARM] pxa: fix no reference of cpu_is_pxa25x() in devices.c
[ARM] pxa/cm-x300: add PWM backlight support
revert "[ARM] pxa/cm-x300: add PWM backlight support"
ARM: use flush_kernel_dcache_area() for dmabounce
ARM: add size argument to __cpuc_flush_dcache_page
ARM: 5848/1: kill flush_ioremap_region()
ARM: cache-l2x0: make better use of background cache handling
ARM: cache-l2x0: avoid taking spinlock for every iteration
[ARM] Kirkwood: Add LaCie Network Space v2 support
ARM: dove: fix the mm mmu flags of the pj4 procinfo
Diffstat (limited to 'arch/arm/mm/cache-v4.S')
-rw-r--r-- | arch/arm/mm/cache-v4.S | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S index 3668611cb400..5c7da3e372e9 100644 --- a/arch/arm/mm/cache-v4.S +++ b/arch/arm/mm/cache-v4.S | |||
@@ -82,14 +82,15 @@ ENTRY(v4_coherent_user_range) | |||
82 | mov pc, lr | 82 | mov pc, lr |
83 | 83 | ||
84 | /* | 84 | /* |
85 | * flush_kern_dcache_page(void *page) | 85 | * flush_kern_dcache_area(void *addr, size_t size) |
86 | * | 86 | * |
87 | * Ensure no D cache aliasing occurs, either with itself or | 87 | * Ensure no D cache aliasing occurs, either with itself or |
88 | * the I cache | 88 | * the I cache |
89 | * | 89 | * |
90 | * - addr - page aligned address | 90 | * - addr - kernel address |
91 | * - size - region size | ||
91 | */ | 92 | */ |
92 | ENTRY(v4_flush_kern_dcache_page) | 93 | ENTRY(v4_flush_kern_dcache_area) |
93 | /* FALLTHROUGH */ | 94 | /* FALLTHROUGH */ |
94 | 95 | ||
95 | /* | 96 | /* |
@@ -141,7 +142,7 @@ ENTRY(v4_cache_fns) | |||
141 | .long v4_flush_user_cache_range | 142 | .long v4_flush_user_cache_range |
142 | .long v4_coherent_kern_range | 143 | .long v4_coherent_kern_range |
143 | .long v4_coherent_user_range | 144 | .long v4_coherent_user_range |
144 | .long v4_flush_kern_dcache_page | 145 | .long v4_flush_kern_dcache_area |
145 | .long v4_dma_inv_range | 146 | .long v4_dma_inv_range |
146 | .long v4_dma_clean_range | 147 | .long v4_dma_clean_range |
147 | .long v4_dma_flush_range | 148 | .long v4_dma_flush_range |