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authorRussell King <rmk+kernel@arm.linux.org.uk>2014-03-15 12:47:55 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-05-29 19:47:45 -0400
commit9846dfc98f0e3482e3d0df91bea67ead728301ac (patch)
tree2748841b54eddf3aace14e1c0ff7babf3e271ccc /arch/arm/mm/cache-l2x0.c
parent96054b0a99f4b7104c02e5521ee5c0d7b1fb09bc (diff)
ARM: l2c: pass iomem address into data->save function
Pass the iomem address into this function so we don't have to keep accessing it from a global. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/cache-l2x0.c')
-rw-r--r--arch/arm/mm/cache-l2x0.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 0d83b24b7971..08f9cade028a 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -30,7 +30,7 @@
30 30
31struct l2c_init_data { 31struct l2c_init_data {
32 void (*of_parse)(const struct device_node *, u32 *, u32 *); 32 void (*of_parse)(const struct device_node *, u32 *, u32 *);
33 void (*save)(void); 33 void (*save)(void __iomem *);
34 struct outer_cache_fns outer_cache; 34 struct outer_cache_fns outer_cache;
35}; 35};
36 36
@@ -764,47 +764,47 @@ static void __init pl310_of_parse(const struct device_node *np,
764 } 764 }
765} 765}
766 766
767static void __init pl310_save(void) 767static void __init pl310_save(void __iomem *base)
768{ 768{
769 u32 l2x0_revision = readl_relaxed(l2x0_base + L2X0_CACHE_ID) & 769 u32 l2x0_revision = readl_relaxed(base + L2X0_CACHE_ID) &
770 L2X0_CACHE_ID_RTL_MASK; 770 L2X0_CACHE_ID_RTL_MASK;
771 771
772 l2x0_saved_regs.tag_latency = readl_relaxed(l2x0_base + 772 l2x0_saved_regs.tag_latency = readl_relaxed(base +
773 L2X0_TAG_LATENCY_CTRL); 773 L2X0_TAG_LATENCY_CTRL);
774 l2x0_saved_regs.data_latency = readl_relaxed(l2x0_base + 774 l2x0_saved_regs.data_latency = readl_relaxed(base +
775 L2X0_DATA_LATENCY_CTRL); 775 L2X0_DATA_LATENCY_CTRL);
776 l2x0_saved_regs.filter_end = readl_relaxed(l2x0_base + 776 l2x0_saved_regs.filter_end = readl_relaxed(base +
777 L2X0_ADDR_FILTER_END); 777 L2X0_ADDR_FILTER_END);
778 l2x0_saved_regs.filter_start = readl_relaxed(l2x0_base + 778 l2x0_saved_regs.filter_start = readl_relaxed(base +
779 L2X0_ADDR_FILTER_START); 779 L2X0_ADDR_FILTER_START);
780 780
781 if (l2x0_revision >= L310_CACHE_ID_RTL_R2P0) { 781 if (l2x0_revision >= L310_CACHE_ID_RTL_R2P0) {
782 /* 782 /*
783 * From r2p0, there is Prefetch offset/control register 783 * From r2p0, there is Prefetch offset/control register
784 */ 784 */
785 l2x0_saved_regs.prefetch_ctrl = readl_relaxed(l2x0_base + 785 l2x0_saved_regs.prefetch_ctrl = readl_relaxed(base +
786 L2X0_PREFETCH_CTRL); 786 L2X0_PREFETCH_CTRL);
787 /* 787 /*
788 * From r3p0, there is Power control register 788 * From r3p0, there is Power control register
789 */ 789 */
790 if (l2x0_revision >= L310_CACHE_ID_RTL_R3P0) 790 if (l2x0_revision >= L310_CACHE_ID_RTL_R3P0)
791 l2x0_saved_regs.pwr_ctrl = readl_relaxed(l2x0_base + 791 l2x0_saved_regs.pwr_ctrl = readl_relaxed(base +
792 L2X0_POWER_CTRL); 792 L2X0_POWER_CTRL);
793 } 793 }
794} 794}
795 795
796static void aurora_save(void) 796static void aurora_save(void __iomem *base)
797{ 797{
798 l2x0_saved_regs.ctrl = readl_relaxed(l2x0_base + L2X0_CTRL); 798 l2x0_saved_regs.ctrl = readl_relaxed(base + L2X0_CTRL);
799 l2x0_saved_regs.aux_ctrl = readl_relaxed(l2x0_base + L2X0_AUX_CTRL); 799 l2x0_saved_regs.aux_ctrl = readl_relaxed(base + L2X0_AUX_CTRL);
800} 800}
801 801
802static void __init tauros3_save(void) 802static void __init tauros3_save(void __iomem *base)
803{ 803{
804 l2x0_saved_regs.aux2_ctrl = 804 l2x0_saved_regs.aux2_ctrl =
805 readl_relaxed(l2x0_base + TAUROS3_AUX2_CTRL); 805 readl_relaxed(base + TAUROS3_AUX2_CTRL);
806 l2x0_saved_regs.prefetch_ctrl = 806 l2x0_saved_regs.prefetch_ctrl =
807 readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL); 807 readl_relaxed(base + L2X0_PREFETCH_CTRL);
808} 808}
809 809
810static void l2x0_resume(void) 810static void l2x0_resume(void)
@@ -1024,7 +1024,7 @@ int __init l2x0_of_init(u32 aux_val, u32 aux_mask)
1024 } 1024 }
1025 1025
1026 if (data->save) 1026 if (data->save)
1027 data->save(); 1027 data->save(l2x0_base);
1028 1028
1029 if (cache_id_part_number_from_dt) 1029 if (cache_id_part_number_from_dt)
1030 cache_id = cache_id_part_number_from_dt; 1030 cache_id = cache_id_part_number_from_dt;