diff options
author | Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> | 2009-12-02 00:18:03 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-12-03 14:42:30 -0500 |
commit | 48371cd3f4226275c529bb8675a99572db19cc7c (patch) | |
tree | c76042ed297179c2c4823d11f2c9d7447049ae1a /arch/arm/mm/cache-l2x0.c | |
parent | 1f739d7643c4cf78b4f2d9d620c4305aafc7d3b9 (diff) |
ARM: 5845/1: l2x0: check whether l2x0 already enabled
If running in non-secure mode accessing
some registers of l2x0 will fault. So
check if l2x0 is already enabled, if so
do not access those secure registers.
Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/cache-l2x0.c')
-rw-r--r-- | arch/arm/mm/cache-l2x0.c | 25 |
1 files changed, 16 insertions, 9 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index b480f1d3591f..747f9a9021bb 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c | |||
@@ -99,18 +99,25 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | |||
99 | 99 | ||
100 | l2x0_base = base; | 100 | l2x0_base = base; |
101 | 101 | ||
102 | /* disable L2X0 */ | 102 | /* |
103 | writel(0, l2x0_base + L2X0_CTRL); | 103 | * Check if l2x0 controller is already enabled. |
104 | * If you are booting from non-secure mode | ||
105 | * accessing the below registers will fault. | ||
106 | */ | ||
107 | if (!(readl(l2x0_base + L2X0_CTRL) & 1)) { | ||
104 | 108 | ||
105 | aux = readl(l2x0_base + L2X0_AUX_CTRL); | 109 | /* l2x0 controller is disabled */ |
106 | aux &= aux_mask; | ||
107 | aux |= aux_val; | ||
108 | writel(aux, l2x0_base + L2X0_AUX_CTRL); | ||
109 | 110 | ||
110 | l2x0_inv_all(); | 111 | aux = readl(l2x0_base + L2X0_AUX_CTRL); |
112 | aux &= aux_mask; | ||
113 | aux |= aux_val; | ||
114 | writel(aux, l2x0_base + L2X0_AUX_CTRL); | ||
111 | 115 | ||
112 | /* enable L2X0 */ | 116 | l2x0_inv_all(); |
113 | writel(1, l2x0_base + L2X0_CTRL); | 117 | |
118 | /* enable L2X0 */ | ||
119 | writel(1, l2x0_base + L2X0_CTRL); | ||
120 | } | ||
114 | 121 | ||
115 | outer_cache.inv_range = l2x0_inv_range; | 122 | outer_cache.inv_range = l2x0_inv_range; |
116 | outer_cache.clean_range = l2x0_clean_range; | 123 | outer_cache.clean_range = l2x0_clean_range; |