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author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-06-26 08:42:01 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-06-29 05:06:36 -0400 |
commit | be020f8618caa0670a2a5b5a5df79549520f7867 (patch) | |
tree | 5b85ecbab42342e2ddc6de5b9ea7b4e9fb2f1cef /arch/arm/mm/abort-macro.S | |
parent | 0402becef94c43bb2bb483653a5cee2fb5049764 (diff) |
ARM: entry: abort-macro: specify registers to be used for macros
Require all callers of abort macros to specify the registers to be
used. This improves the documentation at the callsites as to which
registers are being used by this assembly code.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/abort-macro.S')
-rw-r--r-- | arch/arm/mm/abort-macro.S | 30 |
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/mm/abort-macro.S b/arch/arm/mm/abort-macro.S index d7cb1bfa51a4..8d3b9f999d1e 100644 --- a/arch/arm/mm/abort-macro.S +++ b/arch/arm/mm/abort-macro.S | |||
@@ -9,33 +9,33 @@ | |||
9 | * | 9 | * |
10 | */ | 10 | */ |
11 | 11 | ||
12 | .macro do_thumb_abort | 12 | .macro do_thumb_abort, fsr, pc, psr, tmp |
13 | tst r3, #PSR_T_BIT | 13 | tst \psr, #PSR_T_BIT |
14 | beq not_thumb | 14 | beq not_thumb |
15 | ldrh r3, [r2] @ Read aborted Thumb instruction | 15 | ldrh \tmp, [\pc] @ Read aborted Thumb instruction |
16 | and r3, r3, # 0xfe00 @ Mask opcode field | 16 | and \tmp, \tmp, # 0xfe00 @ Mask opcode field |
17 | cmp r3, # 0x5600 @ Is it ldrsb? | 17 | cmp \tmp, # 0x5600 @ Is it ldrsb? |
18 | orreq r3, r3, #1 << 11 @ Set L-bit if yes | 18 | orreq \tmp, \tmp, #1 << 11 @ Set L-bit if yes |
19 | tst r3, #1 << 11 @ L = 0 -> write | 19 | tst \tmp, #1 << 11 @ L = 0 -> write |
20 | orreq r1, r1, #1 << 11 @ yes. | 20 | orreq \psr, \psr, #1 << 11 @ yes. |
21 | mov pc, lr | 21 | mov pc, lr |
22 | not_thumb: | 22 | not_thumb: |
23 | .endm | 23 | .endm |
24 | 24 | ||
25 | /* | 25 | /* |
26 | * We check for the following insturction encoding for LDRD. | 26 | * We check for the following instruction encoding for LDRD. |
27 | * | 27 | * |
28 | * [27:25] == 0 | 28 | * [27:25] == 000 |
29 | * [7:4] == 1101 | 29 | * [7:4] == 1101 |
30 | * [20] == 0 | 30 | * [20] == 0 |
31 | */ | 31 | */ |
32 | .macro do_ldrd_abort | 32 | .macro do_ldrd_abort, tmp, insn |
33 | tst r3, #0x0e000000 @ [27:25] == 0 | 33 | tst \insn, #0x0e000000 @ [27:25] == 0 |
34 | bne not_ldrd | 34 | bne not_ldrd |
35 | and r2, r3, #0x000000f0 @ [7:4] == 1101 | 35 | and \tmp, \insn, #0x000000f0 @ [7:4] == 1101 |
36 | cmp r2, #0x000000d0 | 36 | cmp \tmp, #0x000000d0 |
37 | bne not_ldrd | 37 | bne not_ldrd |
38 | tst r3, #1 << 20 @ [20] == 0 | 38 | tst \insn, #1 << 20 @ [20] == 0 |
39 | moveq pc, lr | 39 | moveq pc, lr |
40 | not_ldrd: | 40 | not_ldrd: |
41 | .endm | 41 | .endm |