diff options
| author | Lennert Buytenhek <buytenh@marvell.com> | 2009-11-24 12:33:52 -0500 |
|---|---|---|
| committer | Nicolas Pitre <nico@fluxnic.net> | 2009-11-27 15:43:21 -0500 |
| commit | 573a652fb0da50a1ff3fca2c67afd81138fd06d2 (patch) | |
| tree | e393e667f733db56447c266d45e58accf141894f /arch/arm/mm/Makefile | |
| parent | edabd38e1a017e922e3e3b485ee3ddb4df433aa4 (diff) | |
ARM: Add Tauros2 L2 cache controller support
Support for the Tauros2 L2 cache controller as used with the PJ1
and PJ4 CPUs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/mm/Makefile')
| -rw-r--r-- | arch/arm/mm/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index 055cb2aa8134..06bcf2e73858 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile | |||
| @@ -87,4 +87,4 @@ obj-$(CONFIG_CPU_V7) += proc-v7.o | |||
| 87 | obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o | 87 | obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o |
| 88 | obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o | 88 | obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o |
| 89 | obj-$(CONFIG_CACHE_XSC3L2) += cache-xsc3l2.o | 89 | obj-$(CONFIG_CACHE_XSC3L2) += cache-xsc3l2.o |
| 90 | 90 | obj-$(CONFIG_CACHE_TAUROS2) += cache-tauros2.o | |