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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2007-05-17 05:19:23 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-17 05:19:23 -0400
commit516793c61b3db1f60e0b0d0e3c382bcca9ae84fd (patch)
tree1e9a0b8e01ecac7c60c5d0f6b157181ab1132467 /arch/arm/mm/Kconfig
parentc6af66b9fe93990c70aaee53ce3ce7e53a83676a (diff)
[ARM] ARMv6: add CPU_HAS_ASID configuration
Presently, we check for the minimum ARM architecture that we're building for to determine whether we need ASID support. This is wrong - if we're going to support a range of CPUs which include ARMv6 or higher, we need the ASID. Convert the checks to use a new configuration symbol, and arrange for ARMv6 and higher CPU entries to select it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/Kconfig')
-rw-r--r--arch/arm/mm/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 15f0284010ca..5f472a8b406a 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -351,6 +351,7 @@ config CPU_V6
351 select CPU_CACHE_V6 351 select CPU_CACHE_V6
352 select CPU_CACHE_VIPT 352 select CPU_CACHE_VIPT
353 select CPU_CP15_MMU 353 select CPU_CP15_MMU
354 select CPU_HAS_ASID
354 select CPU_COPY_V6 if MMU 355 select CPU_COPY_V6 if MMU
355 select CPU_TLB_V6 if MMU 356 select CPU_TLB_V6 if MMU
356 357
@@ -376,6 +377,7 @@ config CPU_V7
376 select CPU_CACHE_V7 377 select CPU_CACHE_V7
377 select CPU_CACHE_VIPT 378 select CPU_CACHE_VIPT
378 select CPU_CP15_MMU 379 select CPU_CP15_MMU
380 select CPU_HAS_ASID
379 select CPU_COPY_V6 if MMU 381 select CPU_COPY_V6 if MMU
380 select CPU_TLB_V6 if MMU 382 select CPU_TLB_V6 if MMU
381 383
@@ -498,6 +500,12 @@ config CPU_TLB_V6
498 500
499endif 501endif
500 502
503config CPU_HAS_ASID
504 bool
505 help
506 This indicates whether the CPU has the ASID register; used to
507 tag TLB and possibly cache entries.
508
501config CPU_CP15 509config CPU_CP15
502 bool 510 bool
503 help 511 help