[ARM] nommu: add ARM740T core support

This patch adds ARM740T core support which has a MPU and 4KB or 8KB cache.

Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 17 insertions, 2 deletions

diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 9f860aa9c908..87f9fece9606 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -75,6 +75,21 @@ config CPU_ARM720T
           Say Y if you want support for the ARM720T processor.
           Otherwise, say N.
 
+# ARM740T
+config CPU_ARM740T
+        bool "Support ARM740T processor" if ARCH_INTEGRATOR
+        select CPU_32v4T
+        select CPU_ABRT_LV4T
+        select CPU_CACHE_V3     # although the core is v4t
+        select CPU_CP15_MPU
+        help
+          A 32-bit RISC processor with 8KB cache or 4KB variants,
+          write buffer and MPU(Protection Unit) built around
+          an ARM7TDMI core.
+
+          Say Y if you want support for the ARM740T processor.
+          Otherwise, say N.
+
 # ARM920T
 config CPU_ARM920T
         bool "Support ARM920T processor"
@@ -436,7 +451,7 @@ comment "Processor Features"
 
 config ARM_THUMB
         bool "Support Thumb user binaries"
-        depends on CPU_ARM720T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_V6
+        depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_V6
         default y
         help
           Say Y if you want to include kernel support for running user space
@@ -473,7 +488,7 @@ config CPU_DCACHE_DISABLE
 
 config CPU_DCACHE_WRITETHROUGH
         bool "Force write through D-cache"
-        depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_V6) && !CPU_DCACHE_DISABLE
+        depends on (CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020 || CPU_V6) && !CPU_DCACHE_DISABLE
         default y if CPU_ARM925T
         help
           Say Y here to use the data cache in writethrough mode. Unless you