diff options
author | Josh Cartwright <josh.cartwright@ni.com> | 2012-11-19 12:38:29 -0500 |
---|---|---|
committer | Michal Simek <michal.simek@xilinx.com> | 2012-11-21 04:52:13 -0500 |
commit | 9a45eb691d8712b64a733178746557f708043444 (patch) | |
tree | 13dc80bff8935c32e7fa209891ff03cfb89dc809 /arch/arm/mach-zynq | |
parent | 385f02b1696004461d89589e69ae7247081a74a2 (diff) |
ARM: zynq: add support for ARCH_MULTIPLATFORM
The majority of changes are necessary to remove dependencies on header
files within arch/arm/mach-zynq/include/mach:
uncompress.h
- Deleted. It is unused for ARCH_MULTIPLATFORM builds.
uart.h:
- Move uart definitions out of uart.h into debug/zynq.S, which is
now the only user
zynq_soc.h:
- Move SCU address definitions into common.c.
- Other #defines, such as PERIPHERAL_CLOCK_RATE, TTC0_BASE, etc, are
unused and can be dropped
Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/mach-zynq')
-rw-r--r-- | arch/arm/mach-zynq/Kconfig | 13 | ||||
-rw-r--r-- | arch/arm/mach-zynq/common.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-zynq/include/mach/uart.h | 25 | ||||
-rw-r--r-- | arch/arm/mach-zynq/include/mach/uncompress.h | 51 | ||||
-rw-r--r-- | arch/arm/mach-zynq/include/mach/zynq_soc.h | 49 |
5 files changed, 17 insertions, 129 deletions
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig new file mode 100644 index 000000000000..adb6c0ea0e53 --- /dev/null +++ b/arch/arm/mach-zynq/Kconfig | |||
@@ -0,0 +1,13 @@ | |||
1 | config ARCH_ZYNQ | ||
2 | bool "Xilinx Zynq ARM Cortex A9 Platform" if ARCH_MULTI_V7 | ||
3 | select ARM_AMBA | ||
4 | select ARM_GIC | ||
5 | select COMMON_CLK | ||
6 | select CPU_V7 | ||
7 | select GENERIC_CLOCKEVENTS | ||
8 | select ICST | ||
9 | select MIGHT_HAVE_CACHE_L2X0 | ||
10 | select USE_OF | ||
11 | select SPARSE_IRQ | ||
12 | help | ||
13 | Support for Xilinx Zynq ARM Cortex A9 Platform | ||
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c index a2f48daa11ca..e16d4bed0f7a 100644 --- a/arch/arm/mach-zynq/common.c +++ b/arch/arm/mach-zynq/common.c | |||
@@ -30,10 +30,10 @@ | |||
30 | #include <asm/mach/time.h> | 30 | #include <asm/mach/time.h> |
31 | #include <asm/mach-types.h> | 31 | #include <asm/mach-types.h> |
32 | #include <asm/page.h> | 32 | #include <asm/page.h> |
33 | #include <asm/pgtable.h> | ||
33 | #include <asm/hardware/gic.h> | 34 | #include <asm/hardware/gic.h> |
34 | #include <asm/hardware/cache-l2x0.h> | 35 | #include <asm/hardware/cache-l2x0.h> |
35 | 36 | ||
36 | #include <mach/zynq_soc.h> | ||
37 | #include "common.h" | 37 | #include "common.h" |
38 | 38 | ||
39 | static struct of_device_id zynq_of_bus_ids[] __initdata = { | 39 | static struct of_device_id zynq_of_bus_ids[] __initdata = { |
@@ -68,9 +68,9 @@ static void __init xilinx_irq_init(void) | |||
68 | of_irq_init(irq_match); | 68 | of_irq_init(irq_match); |
69 | } | 69 | } |
70 | 70 | ||
71 | /* The minimum devices needed to be mapped before the VM system is up and | 71 | #define SCU_PERIPH_PHYS 0xF8F00000 |
72 | * running include the GIC, UART and Timer Counter. | 72 | #define SCU_PERIPH_SIZE SZ_8K |
73 | */ | 73 | #define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE) |
74 | 74 | ||
75 | static struct map_desc scu_desc __initdata = { | 75 | static struct map_desc scu_desc __initdata = { |
76 | .virtual = SCU_PERIPH_VIRT, | 76 | .virtual = SCU_PERIPH_VIRT, |
diff --git a/arch/arm/mach-zynq/include/mach/uart.h b/arch/arm/mach-zynq/include/mach/uart.h deleted file mode 100644 index 5c47c97156f3..000000000000 --- a/arch/arm/mach-zynq/include/mach/uart.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* arch/arm/mach-zynq/include/mach/uart.h | ||
2 | * | ||
3 | * Copyright (C) 2011 Xilinx | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | */ | ||
14 | |||
15 | #ifndef __MACH_UART_H__ | ||
16 | #define __MACH_UART_H__ | ||
17 | |||
18 | #define UART_CR_OFFSET 0x00 /* Control Register [8:0] */ | ||
19 | #define UART_SR_OFFSET 0x2C /* Channel Status [11:0] */ | ||
20 | #define UART_FIFO_OFFSET 0x30 /* FIFO [15:0] or [7:0] */ | ||
21 | |||
22 | #define UART_SR_TXFULL 0x00000010 /* TX FIFO full */ | ||
23 | #define UART_SR_TXEMPTY 0x00000008 /* TX FIFO empty */ | ||
24 | |||
25 | #endif | ||
diff --git a/arch/arm/mach-zynq/include/mach/uncompress.h b/arch/arm/mach-zynq/include/mach/uncompress.h deleted file mode 100644 index af4e8447bfa3..000000000000 --- a/arch/arm/mach-zynq/include/mach/uncompress.h +++ /dev/null | |||
@@ -1,51 +0,0 @@ | |||
1 | /* arch/arm/mach-zynq/include/mach/uncompress.h | ||
2 | * | ||
3 | * Copyright (C) 2011 Xilinx | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | */ | ||
14 | |||
15 | #ifndef __MACH_UNCOMPRESS_H__ | ||
16 | #define __MACH_UNCOMPRESS_H__ | ||
17 | |||
18 | #include <linux/io.h> | ||
19 | #include <asm/processor.h> | ||
20 | #include <mach/zynq_soc.h> | ||
21 | #include <mach/uart.h> | ||
22 | |||
23 | void arch_decomp_setup(void) | ||
24 | { | ||
25 | } | ||
26 | |||
27 | static inline void flush(void) | ||
28 | { | ||
29 | /* | ||
30 | * Wait while the FIFO is not empty | ||
31 | */ | ||
32 | while (!(__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) & | ||
33 | UART_SR_TXEMPTY)) | ||
34 | cpu_relax(); | ||
35 | } | ||
36 | |||
37 | #define arch_decomp_wdog() | ||
38 | |||
39 | static void putc(char ch) | ||
40 | { | ||
41 | /* | ||
42 | * Wait for room in the FIFO, then write the char into the FIFO | ||
43 | */ | ||
44 | while (__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) & | ||
45 | UART_SR_TXFULL) | ||
46 | cpu_relax(); | ||
47 | |||
48 | __raw_writel(ch, IOMEM(LL_UART_PADDR + UART_FIFO_OFFSET)); | ||
49 | } | ||
50 | |||
51 | #endif | ||
diff --git a/arch/arm/mach-zynq/include/mach/zynq_soc.h b/arch/arm/mach-zynq/include/mach/zynq_soc.h deleted file mode 100644 index 2995044682dc..000000000000 --- a/arch/arm/mach-zynq/include/mach/zynq_soc.h +++ /dev/null | |||
@@ -1,49 +0,0 @@ | |||
1 | /* arch/arm/mach-zynq/include/mach/zynq_soc.h | ||
2 | * | ||
3 | * Copyright (C) 2011 Xilinx | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | */ | ||
14 | |||
15 | #ifndef __MACH_XILINX_SOC_H__ | ||
16 | #define __MACH_XILINX_SOC_H__ | ||
17 | |||
18 | #include <asm/pgtable.h> | ||
19 | |||
20 | #define PERIPHERAL_CLOCK_RATE 2500000 | ||
21 | |||
22 | /* Static peripheral mappings are mapped at the top of the vmalloc region. The | ||
23 | * early uart mapping causes intermediate problems/failure at certain | ||
24 | * addresses, including the very top of the vmalloc region. Map it at an | ||
25 | * address that is known to work. | ||
26 | */ | ||
27 | #define UART0_PHYS 0xE0000000 | ||
28 | #define UART1_PHYS 0xE0001000 | ||
29 | #define UART_SIZE SZ_4K | ||
30 | #define UART_VIRT 0xF0001000 | ||
31 | |||
32 | #define SCU_PERIPH_PHYS 0xF8F00000 | ||
33 | #define SCU_PERIPH_SIZE SZ_8K | ||
34 | #define SCU_PERIPH_VIRT (VMALLOC_END - SCU_PERIPH_SIZE) | ||
35 | |||
36 | #if IS_ENABLED(CONFIG_DEBUG_ZYNQ_UART1) | ||
37 | # define LL_UART_PADDR UART1_PHYS | ||
38 | #else | ||
39 | # define LL_UART_PADDR UART0_PHYS | ||
40 | #endif | ||
41 | |||
42 | #define LL_UART_VADDR UART_VIRT | ||
43 | |||
44 | /* The following are intended for the devices that are mapped early */ | ||
45 | |||
46 | #define TTC0_BASE IOMEM(TTC0_VIRT) | ||
47 | #define SCU_PERIPH_BASE IOMEM(SCU_PERIPH_VIRT) | ||
48 | |||
49 | #endif | ||