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authorMichal Simek <michal.simek@xilinx.com>2013-03-27 07:37:53 -0400
committerMichal Simek <michal.simek@xilinx.com>2013-04-04 03:22:29 -0400
commit64b889b39e9958fdcfe5e9b7aa1ac0ffca3fc9a2 (patch)
tree6f622eb95cc4f27e57b2f84487247248675da7bf /arch/arm/mach-zynq
parent732078c369f0b6ad9fe75c1faff721e91260bc5d (diff)
arm: zynq: Move slcr initialization to separate file
Create separate slcr driver instead of polluting common code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/mach-zynq')
-rw-r--r--arch/arm/mach-zynq/Makefile2
-rw-r--r--arch/arm/mach-zynq/common.c10
-rw-r--r--arch/arm/mach-zynq/common.h3
-rw-r--r--arch/arm/mach-zynq/slcr.c69
4 files changed, 74 insertions, 10 deletions
diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile
index 320faedeb484..13ee09b563ad 100644
--- a/arch/arm/mach-zynq/Makefile
+++ b/arch/arm/mach-zynq/Makefile
@@ -3,4 +3,4 @@
3# 3#
4 4
5# Common support 5# Common support
6obj-y := common.o 6obj-y := common.o slcr.o
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index f9e5f3ac8eec..cd3968c28904 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -61,15 +61,7 @@ static void __init xilinx_init_machine(void)
61 61
62static void __init xilinx_zynq_timer_init(void) 62static void __init xilinx_zynq_timer_init(void)
63{ 63{
64 struct device_node *np; 64 zynq_slcr_init();
65 void __iomem *slcr;
66
67 np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr");
68 slcr = of_iomap(np, 0);
69 WARN_ON(!slcr);
70
71 xilinx_zynq_clocks_init(slcr);
72
73 clocksource_of_init(); 65 clocksource_of_init();
74} 66}
75 67
diff --git a/arch/arm/mach-zynq/common.h b/arch/arm/mach-zynq/common.h
index d7164d50cffe..dd594e672ed4 100644
--- a/arch/arm/mach-zynq/common.h
+++ b/arch/arm/mach-zynq/common.h
@@ -17,6 +17,9 @@
17#ifndef __MACH_ZYNQ_COMMON_H__ 17#ifndef __MACH_ZYNQ_COMMON_H__
18#define __MACH_ZYNQ_COMMON_H__ 18#define __MACH_ZYNQ_COMMON_H__
19 19
20extern int zynq_slcr_init(void);
21
22extern void __iomem *zynq_slcr_base;
20extern void __iomem *zynq_scu_base; 23extern void __iomem *zynq_scu_base;
21 24
22#endif 25#endif
diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c
new file mode 100644
index 000000000000..f9f33496cee9
--- /dev/null
+++ b/arch/arm/mach-zynq/slcr.c
@@ -0,0 +1,69 @@
1/*
2 * Xilinx SLCR driver
3 *
4 * Copyright (c) 2011-2013 Xilinx Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * You should have received a copy of the GNU General Public
12 * License along with this program; if not, write to the Free
13 * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA
14 * 02139, USA.
15 */
16
17#include <linux/export.h>
18#include <linux/io.h>
19#include <linux/fs.h>
20#include <linux/interrupt.h>
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/of_address.h>
25#include <linux/uaccess.h>
26#include <linux/platform_device.h>
27#include <linux/slab.h>
28#include <linux/string.h>
29#include <linux/clk/zynq.h>
30#include "common.h"
31
32#define SLCR_UNLOCK_MAGIC 0xDF0D
33#define SLCR_UNLOCK 0x8 /* SCLR unlock register */
34
35void __iomem *zynq_slcr_base;
36
37/**
38 * zynq_slcr_init
39 * Returns 0 on success, negative errno otherwise.
40 *
41 * Called early during boot from platform code to remap SLCR area.
42 */
43int __init zynq_slcr_init(void)
44{
45 struct device_node *np;
46
47 np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr");
48 if (!np) {
49 pr_err("%s: no slcr node found\n", __func__);
50 BUG();
51 }
52
53 zynq_slcr_base = of_iomap(np, 0);
54 if (!zynq_slcr_base) {
55 pr_err("%s: Unable to map I/O memory\n", __func__);
56 BUG();
57 }
58
59 /* unlock the SLCR so that registers can be changed */
60 writel(SLCR_UNLOCK_MAGIC, zynq_slcr_base + SLCR_UNLOCK);
61
62 pr_info("%s mapped to %p\n", np->name, zynq_slcr_base);
63
64 xilinx_zynq_clocks_init(zynq_slcr_base);
65
66 of_node_put(np);
67
68 return 0;
69}