arm: zynq: Move slcr initialization to separate file

Create separate slcr driver instead of polluting common code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

1 files changed, 69 insertions, 0 deletions

diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c
new file mode 100644
index 000000000000..f9f33496cee9
--- /dev/null
+++ b/arch/arm/mach-zynq/slcr.c
@@ -0,0 +1,69 @@
+/*
+ * Xilinx SLCR driver
+ *
+ * Copyright (c) 2011-2013 Xilinx Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * You should have received a copy of the GNU General Public
+ * License along with this program; if not, write to the Free
+ * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA
+ * 02139, USA.
+ */
+
+#include <linux/export.h>
+#include <linux/io.h>
+#include <linux/fs.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_address.h>
+#include <linux/uaccess.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <linux/clk/zynq.h>
+#include "common.h"
+
+#define SLCR_UNLOCK_MAGIC               0xDF0D
+#define SLCR_UNLOCK                     0x8   /* SCLR unlock register */
+
+void __iomem *zynq_slcr_base;
+
+/**
+ * zynq_slcr_init
+ * Returns 0 on success, negative errno otherwise.
+ *
+ * Called early during boot from platform code to remap SLCR area.
+ */
+int __init zynq_slcr_init(void)
+{
+        struct device_node *np;
+
+        np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr");
+        if (!np) {
+                pr_err("%s: no slcr node found\n", __func__);
+                BUG();
+        }
+
+        zynq_slcr_base = of_iomap(np, 0);
+        if (!zynq_slcr_base) {
+                pr_err("%s: Unable to map I/O memory\n", __func__);
+                BUG();
+        }
+
+        /* unlock the SLCR so that registers can be changed */
+        writel(SLCR_UNLOCK_MAGIC, zynq_slcr_base + SLCR_UNLOCK);
+
+        pr_info("%s mapped to %p\n", np->name, zynq_slcr_base);
+
+        xilinx_zynq_clocks_init(zynq_slcr_base);
+
+        of_node_put(np);
+
+        return 0;
+}