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authorLinus Walleij <linus.walleij@linaro.org>2014-03-14 05:26:45 -0400
committerLinus Walleij <linus.walleij@linaro.org>2014-03-14 05:26:45 -0400
commit9e294427f6e427dbaf46140303acded06365f53c (patch)
tree0669100cbd79fe8612463900171c98873d8dc454 /arch/arm/mach-zynq/common.c
parent23600969ff137cf4c3bc9098f77e381de334e3f7 (diff)
parentfa389e220254c69ffae0d403eac4146171062d08 (diff)
Merge tag 'v3.14-rc6' into devel
Linux 3.14-rc6
Diffstat (limited to 'arch/arm/mach-zynq/common.c')
-rw-r--r--arch/arm/mach-zynq/common.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 1db2a5ca9ab8..8c09a8393fb6 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -25,6 +25,7 @@
25#include <linux/of_irq.h> 25#include <linux/of_irq.h>
26#include <linux/of_platform.h> 26#include <linux/of_platform.h>
27#include <linux/of.h> 27#include <linux/of.h>
28#include <linux/memblock.h>
28#include <linux/irqchip.h> 29#include <linux/irqchip.h>
29#include <linux/irqchip/arm-gic.h> 30#include <linux/irqchip/arm-gic.h>
30 31
@@ -41,6 +42,18 @@
41 42
42void __iomem *zynq_scu_base; 43void __iomem *zynq_scu_base;
43 44
45/**
46 * zynq_memory_init - Initialize special memory
47 *
48 * We need to stop things allocating the low memory as DMA can't work in
49 * the 1st 512K of memory.
50 */
51static void __init zynq_memory_init(void)
52{
53 if (!__pa(PAGE_OFFSET))
54 memblock_reserve(__pa(PAGE_OFFSET), __pa(swapper_pg_dir));
55}
56
44static struct platform_device zynq_cpuidle_device = { 57static struct platform_device zynq_cpuidle_device = {
45 .name = "cpuidle-zynq", 58 .name = "cpuidle-zynq",
46}; 59};
@@ -117,5 +130,6 @@ DT_MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
117 .init_machine = zynq_init_machine, 130 .init_machine = zynq_init_machine,
118 .init_time = zynq_timer_init, 131 .init_time = zynq_timer_init,
119 .dt_compat = zynq_dt_match, 132 .dt_compat = zynq_dt_match,
133 .reserve = zynq_memory_init,
120 .restart = zynq_system_reset, 134 .restart = zynq_system_reset,
121MACHINE_END 135MACHINE_END