diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-06-24 16:59:00 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-06-24 16:59:00 -0400 |
commit | b4b664bef407bc80f325b2f2ab9350823c2869de (patch) | |
tree | 68ee04a0c995dbf7aa3ad889362dc63c7c986745 /arch/arm/mach-vexpress | |
parent | 8b8f5d9715845f9ae2b89ce406e71877965b29ca (diff) | |
parent | b8d8772e53f83cc87aeeab1c3a60d5d5d45ce38b (diff) |
Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King:
"A number of low impact fixes, the most noticable one is the thumb2
frame pointer fix. We also fix a regression caused during this merge
window with ARM925 CPUs running with caches disabled, and fix a number
of warnings"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: arm925: ensure assembly sets up writethrough mapping
ARM: perf: fix compiler warning with gcc 4.6.4 (and tidy code)
ARM: l2c: fix dependencies on PL310 errata symbols
ARM: 8069/1: Make thread_save_fp macro aware of THUMB2 mode
ARM: 8068/1: scoop: Remove unused variable
Diffstat (limited to 'arch/arm/mach-vexpress')
-rw-r--r-- | arch/arm/mach-vexpress/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig index 99c1f151c403..d8b9330f896a 100644 --- a/arch/arm/mach-vexpress/Kconfig +++ b/arch/arm/mach-vexpress/Kconfig | |||
@@ -43,7 +43,7 @@ config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA | |||
43 | bool "Enable A5 and A9 only errata work-arounds" | 43 | bool "Enable A5 and A9 only errata work-arounds" |
44 | default y | 44 | default y |
45 | select ARM_ERRATA_720789 | 45 | select ARM_ERRATA_720789 |
46 | select PL310_ERRATA_753970 if CACHE_PL310 | 46 | select PL310_ERRATA_753970 if CACHE_L2X0 |
47 | help | 47 | help |
48 | Provides common dependencies for Versatile Express platforms | 48 | Provides common dependencies for Versatile Express platforms |
49 | based on Cortex-A5 and Cortex-A9 processors. In order to | 49 | based on Cortex-A5 and Cortex-A9 processors. In order to |